Vector integer add-with-carry/subtract-with-borrow instructions missing mask as a source

[kathlenemagnus]

The vadc and vsbc vector instructions are not being decoded correctly. These instructions always enable masking and opcodes where masking is disabled are not supported. To support this in Mavis, the vm field is marked as a fixed field, but Mavis assumes that to mean that masking is disabled.

To test a fix, the opcode 0x403100D7 should print this disassembly (mask register v0 included):

vadc.vvm v1,v2,v3,v0.t

[kathlenemagnus]

@h0lyalg0rithm here is a Mavis issue you can look it. If you look in https://github.com/sparcians/mavis/blob/main/json/isa_rv64v.json you can see how this instruction is defined:

  {
    "mnemonic": "vadc.vvm",
    "tags" : ["v"],
    "form": "V",
    "stencil": "0x40000057",
    "fixed": [ "vm" ],
    "type": [ "vector" ],
    "v-oper": "all"
  },

The stencil defines which bits in an opcode are always set for a particular instruction like the opcode and funct fields. My understanding of the "fixed" fields list is that these are fields that are also always the same. So for this instruction, the VM field is always set to 0. An opcode with the VM bit set to 1 would not be decoded as this instruction. Normally, the VM field is accessible as a "special field", but when it is marked as fixed it is no longer consider a special field of the instruction and its value cannot be accessed.

I don't totally understand how the fixed and special fields work, so please share anything you learn!