haraka-aesni: fix aligned loads from unaligned mem

sphincs / sphincsplus

The SPHINCS+ reference code, accompanying the submission to NIST's Post-Quantum Cryptography project

https://sphincs.org

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haraka-aesni: fix aligned loads from unaligned mem #15

Closed joostrijneveld closed 3 years ago

joostrijneveld commented 4 years ago

This originates from a bug report against libOQS.

This PR simply changes the aligned loads to unaligned loads; perhaps we can be more subtle about it by going through haraka.c in more detail to see which loads can be aligned ― right now it looks like it's all just char arrays.

In the issue thread at liboqs, Douglas remarks that Intel does not document a performance difference. I didn't check ― I'd be happy to hear your thoughts.

bwesterb commented 4 years ago

If the memory is aligned anyway, then the instruction doesn't really make a difference. There is a difference between the performance of AVX2 instructions on aligned and unaligned memory, but that might also just depend on the CPU I tested it on.

thomwiggers commented 3 years ago

This should just be merged I think...