What steps will reproduce the problem?
- CreateDvbInterleaver( msgLength )
What is the expected output? What do you see instead?
- I initially made the same mistake when implementing the interleaver. The spec
defined a two layer interleaver. The first determines which pairs are flipped,
and the second layer permutes the pairs. This is clearly written by a VHDL
programmer, but the indexing used for layer 1 is after the layer 2 permutation.
(Note the variable j and i usage in the spec). If you write the interleaver in
a serial language, the wrong pairs are flipped.
What version of the product are you using? On what operating system?
1.1
Please provide any additional information below.
- This should be a simple fix, and shouldn't impact performance. but
nonetheless incorrect.
Original issue reported on code.google.com by jhuang...@gmail.com on 25 Jun 2015 at 5:35
Original issue reported on code.google.com by
jhuang...@gmail.comon 25 Jun 2015 at 5:35