DFFRAM-laygo2 LVS issue fix

sscs-ose / sscs-ose-code-a-chip.github.io

IEEE Solid-State Circuits Society (SSCS) Open-Source Ecosystem (OSE)

Apache License 2.0

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Closed Park-Hyung-Joo closed 1 year ago

Park-Hyung-Joo commented 1 year ago

ADD: yosys synthesis example( dec3to8 ) FIX: Verilog to laygo2 - LVS issue

msaligane commented 1 year ago

@Park-Hyung-Joo This PR has conflits. Can you resolve them?

Park-Hyung-Joo commented 1 year ago

I'll try again after sync original repo