Add hdl test

[akaeba]

Hi Sergey,

Start with using GHDL for CI sim of the Design. One TB is running. For the _i2c_slavemodel.v i look for an alternativ, cause the GHDl supports no mixed language simualtion.

BR, Andreas

[sshuv]

Hi Andreas!

I would not recommend you to compile everything in the work library.

The more "VHDL way" of doing things would be compiling the sources of iicmb/src directory into separate library, say, iicmb. After that, compile the sources of iicmb/src_tb (testbench-related) into library work.

This can be done like that:

ghdl -a --std=02 --ieee=standard --time-resolution=ps --work=iicmb --workdir=./sim/iicmb ./src/iicmb_pkg.vhd
...
ghdl -a --std=02 --ieee=standard --time-resolution=ps --work=iicmb --workdir=./sim/iicmb ./src/iicmb_m_wb.vhd

and after that:

ghdl -a --std=02 --ieee=standard --time-resolution=ps --work=work --workdir=./sim/work ./src_tb/test.vhd
ghdl -a --std=02 --ieee=standard --time-resolution=ps --work=work --workdir=./sim/work ./src_tb/wire_mdl.vhd
ghdl -a --std=02 --ieee=standard --time-resolution=ps --work=work --workdir=./sim/work -P./sim/iicmb ./src_tb/iicmb_m_tb.vhd

elaborating the testbench:

ghdl -e --work=work --workdir=./sim/work -P./sim/iicmb --syn-binding iicmb_m_tb

and launch the simulation:

ghdl -r iicmb_m_tb --stop-time=1ms

Note option --syn-binding which allows ghdl to find right entity at the elaboration stage for the component iicmb_m (so called "default binding").

Using this sequence of compilation do not require any change in the source files, like:

library work;
use work.iicmb_pkg.all;

in place of:

library iicmb;
use iicmb.iicmb_pkg.all;

and your pull request will consist of the file hdl.yml only.

Best regards, Sergey Shuvalkin

[akaeba]

Hi, good points. I can try to adjust.

[akaeba]

Will be provided by new one, very messed up the commits