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Is U74 L2 LIM usable? #6

Closed lbmeng closed 3 years ago

lbmeng commented 3 years ago

Per current JH7100 datasheet, as well as SiFive's U74 core user manual, there is a L2 LIM mapped at address 0x08000000 with 2MiB size. SiFive FU740 uses this for internal SRAM during early boot process, so does SiFive FU540.

However current JH7100 SoC uses another address range as the internal SRAM during early boot process. The address starts from 0x18000000 / 0x18080000.

Questions is: is L2 LIM not usable on JH7100? If it is usable, why is it not used in the early boot process?

pdp7 commented 3 years ago

@MichaelZhuxx would you be able to comment on the L2 LIM (loosely integrated memory)? thank you!

MichaelZhuxx commented 3 years ago

@pdp7 @lbmeng I think it's theoretically possible, but no one has tried it yet. we will double check with SoC team for futher information.

whuhujin commented 3 years ago

@pdp7 LIM can be used in U7 powers on (at this time, L2 cache only 1 way is used as Cache, other way are disable ,and the sram is accessed as LIM memory map, it is for bootup SRAM), but as I know, in the first boot stage, all cache way is eanable ,so LIM is not there any more.

lbmeng commented 3 years ago

@whuhujin Thanks for the clarification. So this is the same as SiFive FU540/FU740.

Why does on-chip ROM not load secondBoot to L2LIM instead? Even if there is 1 way, there is still 128KiB. Why does JH7100 introduce another internal SRAM mapped at 0x1800_0000?

whuhujin commented 3 years ago

@lbmeng Hi, I discuss with 7100 SOC team:

  1. They integrate a ram which address is 0x1800_0000, and this ram is for other module and they just use this ram for cpu bring up software.
  2. They are open mind if the bring up software to use LIM instead of other specific ram for 7100.

Thanks!

lbmeng commented 3 years ago

Thank you @whuhujin for these additional information!