Configurator: Add support for SandPiper --fmt* options.

[stevehoover]

SandPiper supports a number of --fmt* options that control the formatting of the generated Verilog. It would be nice to provide access in the configurator to these options. (This would, of course, be useful from Makerchip as well.)

[adamint]

@stevehoover I only see --fmtNoSource. Are there others? Site is updated.

[stevehoover]

I think --fmtNoSource, in particular, is recognized by the sandpiper-saas wrapper script. The others are SandPiper parameters. Using sandpiper-saas, sandpiper --sphelp gives:

        --fmtDeclSingleton                      Each HDL signal is declared in its own 
                                                  declaration statement with its own   
                                                  type specification.                  
        --fmtDeclUnifiedHier                    Declare signals in a unified design    
                                                  hierarchy in the generated file, as  
                                                  opposed to inline with scope lines   
                                                  in the translated file.  (No impact  
                                                  if --fmtFlatSignals.)                
        --fmtEscapedNames                       Use escaped HDL names that resemble    
                                                  TLV names as closely as possible.    
        --fmtFlatSignals                        Declare signals at the top level scope 
                                                  in the generated file, and do not    
                                                  use hierarchical signal references.  
        --fmtFullHdlHier                        Provide HDL hierarchy for all scopes,  
                                                  including non-replicated scopes.     
        --fmtNoRespace                          Preserve whitespace in HDL expressions 
                                                  as is.  Do not adjust whitespace to  
                                                  preserve alignment of elements and   
                                                  comments of the expression.          
        --fmtPack <Integer>                     Generate HDL signals as packed to the  
                                                  given number of levels of            
                                                  hierarchy.  (Overruled by --         
                                                  fmtPackAll.) (default: 0)            
        --fmtPackAll                            Generate HDL signals as packed at all  
                                                  levels of hierarchy.  Also, forces   
                                                  behavior of --fmtFlatSignals.        
        --fmtPackBooleans                       Pack an additional level of hierarchy  
                                                  for boolean HDL signals.             
        --fmtStripUniquifiers                   Eliminate the use of uniquifiers in    
                                                  HDL names where possible.            

This is a low-priority issue. I just wanted to capture the thought.