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stevehoover / warp-v

WARP-V is an open-source RISC-V CPU core generator written in TL-Verilog.
https://warp-v.org
BSD 3-Clause "New" or "Revised" License
223 stars 54 forks source link

Multicore Ingress bug and header_flit #67

Closed vineetjain07 closed 3 years ago

vineetjain07 commented 3 years ago

This PR contains - 1) Index in $csr_core for NUM_CORES > 1 (without this, Cores>2 were failing) 2) Shift the $header_flit field to {(msb)VC - SRC - DEST(lsb)} 3) Fix for Ingress buffer, by blocking flits for PKTRD(if flit is invalid on its 1st cycle) until it replays with a valid flit.

vineetjain07 commented 3 years ago

Fixed - 1) typo for GoodPathMask in docs. 2) speculative CSR pktrd. 3) VIZ for /bank[*]