steveicarus / iverilog

Icarus Verilog
https://steveicarus.github.io/iverilog/
GNU General Public License v2.0
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SV: built-in method srandom not supported #439

Open svenka3 opened 3 years ago

svenka3 commented 3 years ago

Hi, I understand random gen is NYI (Not Yet Implemented). However, from UVM lib compile/parse perspective it would help to get parser accept srandom() call. Below is a test:

package t;

  bit use_uvm_seeding;

  class c;
    function void reseed ();
      if(use_uvm_seeding)
    this.srandom(1);
  endfunction

endclass : c
endpackage

module m;
  import t::*;

  initial begin
  end
endmodule 
aa.sv:9: error: Can't find task srandom in class c
aa.sv:9: error: Enable of unknown task ``@.srandom''.
2 error(s) during elaboration.
caryr commented 3 years ago

Based on your comments I assume you want this to be parsed and turned into a NOP or are you looking for a parse and make it a run-time error if executed? The later seems safer. This also should have been added to #369 to keep everything in one place.

I assume you understand adding deterministic randomization and the required constraints is likely a very large task.

svenka3 commented 3 years ago

NOP would be OK as we know constraint random generation is a big feature and not available in Icarus (srandom is a small part of that, not widely used per-se, also not recommended, but UVM has some calls to it).

Maybe a warning if you care to, but not very useful IMHO.

Thanks