Configuration fails in such a way that interrupts are never fired on stm32f4xx

[datdenkikniet]

When setting up an STM32F407, the configuration performed by stm32_eth sometimes fails.

We believe that the erratum described in section 2.11.5 of ES0182, Rev 13 (for F40x and F41x), section 2.17.5 of ES0206, Rev 18 (for F42x and F43x), and section 2.18.5 of ES0321, Rev 8 (for F46x and F47x), may be the cause. A fix requires that least 4 cycles of REF_CLK (usually 50 MHz) pass before a register can be written again, or that we re-write all modified (in the form of a read + write) registers after a delay of at least 4 cycles of REF_CLK.

Measures should be taken so that this can be avoided.

[datdenkikniet]

There's an ugly, bothcy fix available on the botch-fix branch that may solve the problem in some specific cases, for the time being.