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stm32-rs / stm32f1xx-hal

A Rust embedded-hal HAL impl for the STM32F1 family based on japarics stm32f103xx-hal
Apache License 2.0
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PLL2 and PLL3 on STM32F107 #456

Open unsanded opened 1 year ago

unsanded commented 1 year ago

related to #448 Stm32f107 has 3 plls in the clock system. My board uses a 25MHz crystal, so the only way to get to a round 72MHz SYSCLK is to do: 25 / 5 * 8 / 5 * 9 (see the screenshot from cubeMX.

image

The PLL3 is not on the screenshot, but it feeds the i2c, and not in my usecase.

I am considering writing this myself, but i am just getting into rust.

burrbull commented 1 year ago

dividers could be passed directly. See https://github.com/stm32-rs/stm32f1xx-hal/blob/6ff9c63d40d9459eab145bd0bc67d455b02079d4/examples/adc_temperature.rs#L27-L36

But you are right PLL3 is absent. You need to make PR to support it.