stm32-rs / stm32f7xx-hal

A Rust embedded-hal HAL for all MCUs in the STM32 F7 family
Apache License 2.0
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Timer Interrupt clear is incorrect #122

Open jonathanpallant opened 3 years ago

jonathanpallant commented 3 years ago

This code in timer.rs:

pub fn unlisten(&mut self, event: Event) {
    match event {
        Event::TimeOut => {
            // Enable update event interrupt
            self.tim.dier.write(|w| w.uie().clear_bit());
        }
    }
}

should be

pub fn unlisten(&mut self, event: Event) {
    match event {
        Event::TimeOut => {
            // Enable update event interrupt
            self.tim.dier.modify(|_r, w| w.uie().clear_bit());
        }
    }
}

The write call will disable all the interrupts, not just that specified one.