Open kiranshila opened 1 year ago
I've got a project that I'd like to use a G0B1 part on. Can you share your work so far? I might give you a hand
I would appreciate it! I opened a draft PR #138
fyi: embassy-stm32
supports G0Bx/G0Cx, including USB.
Oh this is great, I had no idea! Time to throw out my arduino code...
Hey everyone,
I'm starting a project based on the g0b1 variant (as it's the chip in the series with native USB support (along with the C1) and also a Nucleo board and as such, I think it would make sense to start here in the expansion of this HAL to other chips in the G0 PAC.
I started giving it a go, but this patch seems non-trivial. Apparently, the SVD for the B1 is quite different from the previous chips:
https://github.com/stm32-rs/stm32-rs/issues/548 https://github.com/stm32-rs/stm32-rs/pull/785 https://github.com/stm32-rs/stm32-rs/pull/789
As such, more than just feature-gating various sections of code is needed to describe the discrepancies. For example, I'm working on fixing the USARTs right now, but several assumptions are incorrect:
All of these require additions to the DMAMUX. I've done all of this, but I need help with register naming discrepancies. For example, CR1 is no longer a field on the USARTs as the CR1 register layout is different whether or not the FIFO is enabled. One of the SVD patches defaults that register to the disabled case, but then how would we use the FIFO? The same is true for the ISR register in the USART. I'm sure there are other things I still need to run into, but that was the first blocker.
So, we can write code that has to save some state about the FIFIO configuration and then select the correct register, but that will be quite a bit of complexity to something that might simply be an SVD patch.
Any advice on how to proceed on this would be appreciated. Technically for my project, I need the ADC, DAC, GPIO, and USB UART, which I could hack together - but I would prefer to help get this variant off the ground.
Thanks!