I noticed on my board nucleo-G474-RE when connecting an ADC to ground with RC filter, that the readings were off by 50mV. I noticed that calibrating the ADC before setting the clock config (which the enable function of the HAL also does) results in wrong calibration value (almost max register value). Which resulted in 50 bits offset being applied to my readings. The ADC doesn't work correctly when the clock is higher than the maximum (60MHz), so before the clock mode settings are set the clock might be AHB clock. Calibration should be done before ADEN=1 but after setting the clock mode in the common ADC registers.
Easy fix might be to swap around calibrate_all() and apply_config() calls to calibrate after setting clocks (And other config options, but before enabling the ADC).
Hi,
I noticed on my board nucleo-G474-RE when connecting an ADC to ground with RC filter, that the readings were off by 50mV. I noticed that calibrating the ADC before setting the clock config (which the enable function of the HAL also does) results in wrong calibration value (almost max register value). Which resulted in 50 bits offset being applied to my readings. The ADC doesn't work correctly when the clock is higher than the maximum (60MHz), so before the clock mode settings are set the clock might be AHB clock. Calibration should be done before ADEN=1 but after setting the clock mode in the common ADC registers.
Easy fix might be to swap around calibrate_all() and apply_config() calls to calibrate after setting clocks (And other config options, but before enabling the ADC).