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stnolting / neorv32-riscof

✔️Port of RISCOF to check the NEORV32 for RISC-V ISA compatibility.
https://github.com/stnolting/neorv32
BSD 3-Clause "New" or "Revised" License
25 stars 6 forks source link

[Dependabot]: Bump riscv-arch-test from `46cf99d` to `f3c8300` #148

Closed dependabot[bot] closed 1 year ago

dependabot[bot] commented 1 year ago

Bumps riscv-arch-test from 46cf99d to f3c8300.

Commits
  • f3c8300 Merge pull request #391 from arichardson/assemble-with-llvm
  • 30b7f34 Update CHANGELOG
  • 721b38b arch_test.h: Use .ifc/.ifnc for string comparisons
  • 014aedf Fix undefined label reference in TEST_JAL_OP
  • f66d8ff Merge pull request #357 from ahadali-10x/atomic_ACTs
  • c4a7733 Added Test macro for AMO Ops
  • 2276c09 Update Changelog
  • 4292909 Add 64-bit arch-tests of Atomic Ext.
  • 2466ef1 Add 32-bit arch-tests of Atomic Ext.
  • See full diff in compare view


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