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stnolting / neorv32-riscof

✔️Port of RISCOF to check the NEORV32 for RISC-V ISA compatibility.
https://github.com/stnolting/neorv32
BSD 3-Clause "New" or "Revised" License
25 stars 6 forks source link

[Dependabot]: Bump neorv32 from `af0633d` to `1006e75` #221

Closed dependabot[bot] closed 7 months ago

dependabot[bot] commented 7 months ago

Bumps neorv32 from af0633d to 1006e75.

Commits
  • 1006e75 [ci] test example hello_world as well (#822)
  • dce2a3e [ci] test example hello_world as well
  • 13e583e [cpu] minor cleanup
  • 4aae26b [changelog] cleanup old entries
  • d0c3cfa 🐛 Fix write access to mip.firq CSR bits (#821)
  • 0885938 [ci] split SoftwareFrameworkTests from simple testbench simulation (#820)
  • fc81b10 [ci] let changes in .github/workflows trigger CI
  • dd5922d [ci] split SoftwareFrameworkTests from simple testbench simulation
  • 76cdb7d [changelog] add v1.9.5.6
  • 1bbd2c2 [docs] mip.firq CSR bits are now read-write
  • Additional commits viewable in compare view


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