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stnolting / neorv32-riscof

✔️Port of RISCOF to check the NEORV32 for RISC-V ISA compatibility.
https://github.com/stnolting/neorv32
BSD 3-Clause "New" or "Revised" License
25 stars 6 forks source link

[Dependabot]: Bump neorv32 from `bc1cf1b` to `c1e2b72` #31

Closed dependabot[bot] closed 1 year ago

dependabot[bot] commented 1 year ago

Bumps neorv32 from bc1cf1b to c1e2b72.

Commits
  • c1e2b72 :bug: [sw/lib] fix layout of R4-type instruction intrinsic
  • 9b16eee [sw] rework intrinsic libraries (#448)
  • 89e1517 [sw/example/bit_manip] update
  • 4bfcc05 [sw/example/floating_point] update
  • 7a0e507 [sw/lib] update CFU instruction wrappers
  • 9d7f96d [sw/lib] rework intrinsics primitives
  • 086e456 [rtl] cleanup main package file (#447)
  • 53a9641 [README] add RISC-V architecture ID link
  • da782de [CHANGELOG] add v1.7.8.1
  • d01c9ca [rtl] cleanup main package file
  • See full diff in compare view


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dependabot[bot] commented 1 year ago

OK, I won't notify you again about this release, but will get in touch when a new version is available. You can also ignore all major, minor, or patch releases for a dependency by adding an ignore condition with the desired update_types to your config file.

If you change your mind, just re-open this PR and I'll resolve any conflicts on it.