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stnolting / neorv32-setups

📁 NEORV32 projects and exemplary setups for various FPGAs, boards and (open-source) toolchains.
https://github.com/stnolting/neorv32
BSD 3-Clause "New" or "Revised" License
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Add Arty 35t & 100t support [implementation] #162

Closed Unike267 closed 7 months ago

Unike267 commented 8 months ago

Hi @stnolting

According to what we discussed the other day:

It occurs to me that maybe the arty option can be added to the CI list of implementations. That would be awesome! Feel free to propose a PR for that 😉

I've made the following container:

With:

To perform synthesis + implementation + generate bitstream on the boards:

I've built and pushed this container through continuous integration in the repository:

I've tested the synthesis + implementation + generate bitstream of the NEORV32 in the branch:

And as we can see in these jobs the bitstreams are generated correctly.

I've tested them on Arty A7 35t & 100t and they work fine.

Now the challenge is to add these implementations through the CI of the neorv32-setups repository.

But before starting this work we should wonder, is this implementation really useful? :thinking:

I mean, the implementation is limited because dsp can't be used. The yosys options -nodsp and -nolutram are necessary to perform the implementation.

However, if you are really interested in implementing this option, I could try to solve the challenge of adding arty support through continuous integration of the neorv32-setups.

In my opinion it would be interesting to support Xilinx implementation through FOSS tools.

What do you think?

/cc @umarcor

stnolting commented 8 months ago

Hey @Unike267!

I think it would be really great to have support for an open-source Xilinx flow here! DSPs are a nice feature, but we don't really need them for a simple core configuration (e.g. FAST_MUL_EN => false).

In my opinion it would be interesting to support Xilinx implementation through FOSS tools.

Full ACK! :+1:

Unike267 commented 7 months ago

Hi @stnolting!

I think it would be really great to have support for an open-source Xilinx flow here! DSPs are a nice feature, but we don't really need them for a simple core configuration (e.g. FAST_MUL_EN => false).

Okey perfect!

When I have a moment I will do a PR. Now I'm a little bit busy writing my master thesis 😅 but don't worry I won't forget it.

For the moment I think that we can close this issue.

Thanks for your opinion! 😄

stnolting commented 7 months ago

Awesome!

Just take your time :wink: