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stnolting / neorv32-verilog

♻️ Convert the NEORV32 processor into a synthesizable plain-Verilog netlist module using GHDL.
https://github.com/stnolting/neorv32
BSD 3-Clause "New" or "Revised" License
62 stars 13 forks source link

[Dependabot]: Bump neorv32 from `9700121` to `6c66bb1` #115

Closed dependabot[bot] closed 1 month ago

dependabot[bot] commented 1 month ago

Bumps neorv32 from 9700121 to 6c66bb1.

Commits
  • 6c66bb1 :bug: fix stack alignment upon first procedure entry (#1021)
  • ff8d8c7 [rtl] update pre-built images
  • 80b14f3 [docs] software: add stack alignment
  • 1bae7e0 [crt0] add link to bug-pr
  • 90bc66d [changelog] typo fix
  • 8f0f278 [crt0] fix initial stack setup
  • 2565645 [sw/common] remove unused linker script symbols
  • e416e1f [changelog] add v1.10.3.10
  • 7a497f8 [package] update version ID
  • be02af1 [lib] remove unused linker variables
  • Additional commits viewable in compare view


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