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stnolting / neorv32-verilog

♻️ Convert the NEORV32 processor into a synthesizable plain-Verilog netlist module using GHDL.
https://github.com/stnolting/neorv32
BSD 3-Clause "New" or "Revised" License
61 stars 13 forks source link

Unable to run on Ubuntu 20.04 #7

Closed jeremyherbert closed 2 years ago

jeremyherbert commented 2 years ago

Hi,

I have just cloned the repo and installed the latest version of https://github.com/YosysHQ/oss-cad-suite-build (2022-09-25). I am able to run convert.sh correctly, but when I run iverilog_sim.sh I get the following error (trimmed as it is basically the same thing over and over):

$ ./iverilog_sim.sh
../src/neorv32_verilog_wrapper.v:20290: error: Could not find variable ``n1647_oport['sd1023]'' in ``neorv32_verilog_tb.uut.neorv32_top_inst.neorv32_boot_rom_inst_true_neorv32_boot_rom_inst''
../src/neorv32_verilog_wrapper.v:20291: error: Could not find variable ``n1647_oport['sd1022]'' in ``neorv32_verilog_tb.uut.neorv32_top_inst.neorv32_boot_rom_inst_true_neorv32_boot_rom_inst''
../src/neorv32_verilog_wrapper.v:20292: error: Could not find variable ``n1647_oport['sd1021]'' in ``neorv32_verilog_tb.uut.neorv32_top_inst.neorv32_boot_rom_inst_true_neorv32_boot_rom_inst''
../src/neorv32_verilog_wrapper.v:20293: error: Could not find variable ``n1647_oport['sd1020]'' in ``neorv32_verilog_tb.uut.neorv32_top_inst.neorv32_boot_rom_inst_true_neorv32_boot_rom_inst''
../src/neorv32_verilog_wrapper.v:20294: error: Could not find variable ``n1647_oport['sd1019]'' in ``neorv32_verilog_tb.uut.neorv32_top_inst.neorv32_boot_rom_inst_true_neorv32_boot_rom_inst''

...

../src/neorv32_verilog_wrapper.v:21303: error: Could not find variable ``n1647_oport['sd10]'' in ``neorv32_verilog_tb.uut.neorv32_top_inst.neorv32_boot_rom_inst_true_neorv32_boot_rom_inst''
../src/neorv32_verilog_wrapper.v:21304: error: Could not find variable ``n1647_oport['sd9]'' in ``neorv32_verilog_tb.uut.neorv32_top_inst.neorv32_boot_rom_inst_true_neorv32_boot_rom_inst''
../src/neorv32_verilog_wrapper.v:21305: error: Could not find variable ``n1647_oport['sd8]'' in ``neorv32_verilog_tb.uut.neorv32_top_inst.neorv32_boot_rom_inst_true_neorv32_boot_rom_inst''
../src/neorv32_verilog_wrapper.v:21306: error: Could not find variable ``n1647_oport['sd7]'' in ``neorv32_verilog_tb.uut.neorv32_top_inst.neorv32_boot_rom_inst_true_neorv32_boot_rom_inst''
../src/neorv32_verilog_wrapper.v:21307: error: Could not find variable ``n1647_oport['sd6]'' in ``neorv32_verilog_tb.uut.neorv32_top_inst.neorv32_boot_rom_inst_true_neorv32_boot_rom_inst''
../src/neorv32_verilog_wrapper.v:21308: error: Could not find variable ``n1647_oport['sd5]'' in ``neorv32_verilog_tb.uut.neorv32_top_inst.neorv32_boot_rom_inst_true_neorv32_boot_rom_inst''
../src/neorv32_verilog_wrapper.v:21309: error: Could not find variable ``n1647_oport['sd4]'' in ``neorv32_verilog_tb.uut.neorv32_top_inst.neorv32_boot_rom_inst_true_neorv32_boot_rom_inst''
../src/neorv32_verilog_wrapper.v:21310: error: Could not find variable ``n1647_oport['sd3]'' in ``neorv32_verilog_tb.uut.neorv32_top_inst.neorv32_boot_rom_inst_true_neorv32_boot_rom_inst''
../src/neorv32_verilog_wrapper.v:21311: error: Could not find variable ``n1647_oport['sd2]'' in ``neorv32_verilog_tb.uut.neorv32_top_inst.neorv32_boot_rom_inst_true_neorv32_boot_rom_inst''
../src/neorv32_verilog_wrapper.v:21312: error: Could not find variable ``n1647_oport['sd1]'' in ``neorv32_verilog_tb.uut.neorv32_top_inst.neorv32_boot_rom_inst_true_neorv32_boot_rom_inst''
../src/neorv32_verilog_wrapper.v:21313: error: Could not find variable ``n1647_oport['sd0]'' in ``neorv32_verilog_tb.uut.neorv32_top_inst.neorv32_boot_rom_inst_true_neorv32_boot_rom_inst''
1024 error(s) during elaboration.
./neorv32-verilog-sim: Unable to open input file.

Could you please help me understand what I am doing wrong? I also tried to run the check.sh script from the github CI but it gives the same output.

Some other details:

uname -a:

Linux emu 5.15.0-48-generic #54~20.04.1-Ubuntu SMP Thu Sep 1 16:17:26 UTC 2022 x86_64 x86_64 x86_64 GNU/Linux

iverilog -v:

Icarus Verilog version 12.0 (devel) (s20150603-1609-gfd69d4e09)

...

ghdl -v:

GHDL 2.0.0-dev (tarball) [Dunoon edition] open-tool-forge.nightly-20210921
 Compiled with GNAT Version: 9.3.0
 mcode code generator

...
jeremyherbert commented 2 years ago

It seems that this was due to an old version of GHDL (I had a path problem that was causing it to pick up the old version instead of new). With this GHDL it works fine:

GHDL 3.0.0-dev (2.0.0.r736.g73419afb3.dirty) [Dunoon edition]
 Compiled with GNAT Version: 9.3.0
 llvm code generator
Written by Tristan Gingold.

Copyright (C) 2003 - 2022 Tristan Gingold.
GHDL is free software, covered by the GNU General Public License.  There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
stnolting commented 2 years ago

I also ran into this problem at first. 😅

I will add a GHDL version note to the README.