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stnolting / neorv32-verilog

♻️ Convert the NEORV32 processor into a synthesizable plain-Verilog netlist module using GHDL.
https://github.com/stnolting/neorv32
BSD 3-Clause "New" or "Revised" License
54 stars 11 forks source link

[Dependabot]: Bump neorv32 from `5486aa4` to `46baf5a` #84

Closed dependabot[bot] closed 6 months ago

dependabot[bot] commented 6 months ago

Bumps neorv32 from 5486aa4 to 46baf5a.

Commits
  • 46baf5a rtl cleanups and optimizations (#843)
  • da79ac9 [changelog] add v1.9.6.2
  • fd089b8 [cpu] fix minor HW trigger timing issue
  • 64a59a1 [rtl] fpu is now in "beta" state
  • 8b44e02 [rtl] minor comment edits
  • aa9164e [processor_check] minor fix
  • f588770 [cache] bug fixes
  • b1d3df2 [rtl] update to version 1.9.6.2
  • c0ab01b [cache] heavy cleanups and optimizations
  • df13124 [coremark] minor printf cleanup
  • Additional commits viewable in compare view


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