Amp ctrl (D3)/power (D1) testing of design changes

[dcstraney]

Finish testing changes before next prototyping round (ctrl board D4, power board D2)

• [x] New offset calibration circuit
  • Test the offset cal on all channels (inc. forcing the offset-cal on while OPA548 is enabled, to see where current flows through the collector resistors)
  • On "shutdown logic test" board, add 2x diodes to each channel: anodes on pins 8, 11 of DIP; cathodes all tied together
  • On offset-cal board, connect TP1 to gnd and run this common-diode-cathode signal to the R1/Q1 junction)
• [x] New ADC on EVB
  • Settling time: accuracy when switching channels, or staying on same channel
  • Repeat with multiple candidate op-amps
• [x] Vref stiffness measurement
  • float the picoscope and use a 1x probe to look at Vref_buffered
  • try with bare coax and measure @ testpoint, INA828 on ch.8 - see if that gets rid of all the noise from prev. measurements
  • using Chroma bench supply try for a 5A pulse, to see the actual capability
• [x] Separate ground for current-sense amp
  • Lift gnd pin of INA828 on ch.8, run copper tape from digital section, connect to gnd w/1uF @ far end and use that as gnd for the INA828
  • Before and after mod, look at: CS @ ADC change (DC, transient) and Iout change (DC) for ch.8 when ch.1-7 are stepped to 1A, step/frequency response of ch.8. Previously didn't see much change in ch.8 Iout, but saw CS @ ADC for ch.8 reading erroneously low when ch.1-7 changed.
• [x] Alternate current-sense amps
  • INA818 (lower-power) and INA821 (higher-BW) - test transfer func next to INA828 [INA821 is only one avail as of 2023-01]

[dcstraney]

New ADC works as expected with LT6202, LT6220, ADA4804-1 drivers; ADA4804-1 may have slightly longer settling time, but still within noise (~ ±10 counts, or ±1.5 mA equivalent current-sense reading).

[dcstraney]

Offset-cal works correctly, shows only small current excursion coming out of shutdown.

[dcstraney]

Tested INA821, very slightly better stability