Xilinx Power Estimator spreadsheet estimates 490 mA needed on +2.5V rail for all the Snickerdoodle I/O banks: this is too much current & too much dissipation for existing linear regulator in SOT-23 package.
500 mA * (3.3V - 2.5V) = 400 mW dissipation. This will not be a problem in an SMT package heatsinked to the many large internal copper planes. Even though PCB-plane heatsinking tops out at ~50 K/W, this only results in a Tj rise of +20 K.
dcstraney
commented
2 days ago
Xilinx Power Estimator spreadsheet estimates 490 mA needed on +2.5V rail for all the Snickerdoodle I/O banks: this is too much current & too much dissipation for existing linear regulator in SOT-23 package.
500 mA * (3.3V - 2.5V) = 400 mW dissipation. This will not be a problem in an SMT package heatsinked to the many large internal copper planes. Even though PCB-plane heatsinking tops out at ~50 K/W, this only results in a Tj rise of +20 K.