Closed julianctrt closed 1 year ago
after copy the zcu111 folder and rename it to zcu208. after change the board name to zcu208 the first problem I found while generating the block design is the default_sysclk3_100mhz signal is not available in zcu208.
only available are default_sysclk_c0_300mhz and default_sysclk_c1_300mhz.
after change this signal there are more error with clock frequencies in rfdc but I guess is related to change input frequencies in clock wizard.
Closing this issue as complete.
Hi,
since the zcu208 rfsoc is supported officially in pynq. you consider to add support for this dev board?.