I wrote a patch to make Generic Interrupt Controller (GIC) driver support Private Peripheral Interrupts (PPI) devices. This is needed to support the timer interrupt facility on QEmu for AArch64.
This patch contains:
(1) Introduce macros for the number of interrupt of Software Generated Interrupt (SGI), Private Peripheral Interrupts (PPI), and Shared Peripheral Interrupts (SPI).
(2) Replace gd_spi_setcfg, gd_spi_enable, gd_spi_target0 to support both PPI and SPI. To achieve this, I changed the array size of isrs (NUM_INTSRC).
Hi,
I wrote a patch to make Generic Interrupt Controller (GIC) driver support Private Peripheral Interrupts (PPI) devices. This is needed to support the timer interrupt facility on QEmu for AArch64.
This patch contains:
(1) Introduce macros for the number of interrupt of Software Generated Interrupt (SGI), Private Peripheral Interrupts (PPI), and Shared Peripheral Interrupts (SPI). (2) Replace gd_spi_setcfg, gd_spi_enable, gd_spi_target0 to support both PPI and SPI. To achieve this, I changed the array size of isrs (NUM_INTSRC).
Would you please merge this?
Thanks, Regards,