search

superna9999 / pyamlboot

Amlogic USB Boot Protocol Library
https://pypi.org/project/pyamlboot/
Apache License 2.0
71 stars 27 forks source link

Error log for X96s (s905y2) via p212 #9

Closed dmikushin closed 3 years ago

dmikushin commented 3 years ago 
$ sudo python3 ./boot.py p212
Using GX Family boot parameters
ROM: 0.7 Stage: 0.16
Writing u-boot.bin.usb.bl2 at 0xd9000000...
Traceback (most recent call last):
  File "./boot.py", line 132, in <module>
    usb.load_uboot()
  File "./boot.py", line 86, in load_uboot
    self.init_ddr()
  File "./boot.py", line 75, in init_ddr
    self.write_file(os.path.join(self.bpath, self.BL2_FILE), self.DDR_LOAD)
  File "./boot.py", line 65, in write_file
    self.dev.writeMemory(addr, b)
  File "pyamlboot/pyamlboot/pyamlboot.py", line 86, in writeMemory
    self.writeSimpleMemory(address + offset, data[offset:offset+64])
  File "pyamlboot/pyamlboot/pyamlboot.py", line 78, in writeSimpleMemory
    data_or_wLength = data)
  File "/home/marcusmae/.local/lib/python3.6/site-packages/usb/core.py", line 1077, in ctrl_transfer
    self.__get_timeout(timeout))
  File "/home/marcusmae/.local/lib/python3.6/site-packages/usb/backend/libusb1.py", line 901, in ctrl_transfer
    timeout))
  File "/home/marcusmae/.local/lib/python3.6/site-packages/usb/backend/libusb1.py", line 604, in _check
    raise USBError(_strerror(ret), ret, _libusb_errno[ret])
usb.core.USBError: [Errno 5] Input/Output Error
superna9999 commented 3 years ago

Hi,

Could you run socif.py first ?

dmikushin commented 3 years ago

Hi @superna9999 , strangely enough I get timeout, though the device is present and is the ROM mode:

$ lsusb
Bus 003 Device 004: ID 1b8e:c003 Amlogic, Inc. 
$ sudo ./socid.py 
Traceback (most recent call last):
  File "./socid.py", line 9, in <module>
    dev.nop()
  File "pyamlboot.py", line 334, in nop
    data_or_wLength = None)
  File "/home/marcusmae/.local/lib/python3.6/site-packages/usb/core.py", line 1077, in ctrl_transfer
    self.__get_timeout(timeout))
  File "/home/marcusmae/.local/lib/python3.6/site-packages/usb/backend/libusb1.py", line 901, in ctrl_transfer
    timeout))
  File "/home/marcusmae/.local/lib/python3.6/site-packages/usb/backend/libusb1.py", line 602, in _check
    raise USBTimeoutError(_strerror(ret), ret, _libusb_errno[ret])
usb.core.USBTimeoutError: [Errno 110] Operation timed out
dmikushin commented 3 years ago

Reconnected and tried again - same

dmikushin commented 3 years ago

I've soldered UART and now can get the output:

G12A:BL:0253b8:61aa2d;FEAT:E0F83180:2000;POC:F;RCY:0;EMMC:0;READ:0;0.0
                                                                      l2_stage_init 01
bl2_stage_init 0x81
hw id: 0x0001 - pwm id 0x00
bl2_stage_init 0xc0
bl2_stage_init 0x02

L0:00000000
L1:00000703
L2:00008067
L3:04000000
S1:00000000
B2:00002000
B1:e0f83180

TE: 70814

BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz

Board ID = 2
Set cpu clk to 24M
Set clk81 to 24M
CPU clk: 1200 MHz
Set clk81 to 166.6M
eMMC boot @ 0
sw8 s
DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
board id: 2
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0
fw parse done
Load ddrfw from eMMC, src: 0x00060200, des: 0xfffd0000, size: 0x0000c000, part: 0
Load ddrfw from eMMC, src: 0x00038200, des: 0xfffd0000, size: 0x00004000, part: 0
PIEI prepare done
fastboot data load
00000000
emmc switch 1 ok
ddr saved addr:00016000
Load ddr parameter from eMMC, src: 0x02c00000, des: 0xfffd0000, size: 0x00001000, par0
00000000
emmc switch 0 ok
fastboot data verify
verify result: 265
Cfg max: 5, cur: 1. Board id: 255. Force loop cfg
DDR4 probe
ddr clk to 912MHz
Load ddrfw from eMMC, src: 0x00014200, des: 0xfffd0000, size: 0x0000c000, part: 0

dmc_version 0000
Check phy result
INFO : End of initialization
INFO : ERROR : Training has failed!
1D training failed
Cfg max: 5, cur: 2. Board id: 255. Force loop cfg
DDR3 probe
ddr clk to 792MHz
Load ddrfw from eMMC, src: 0x0002c200, des: 0xfffd0000, size: 0x0000c000, part: 0

dmc_version 0000
Check phy result
INFO : End of initialization
INFO : ERROR : Training has failed!
1D training failed
Cfg max: 5, cur: 3. Board id: 255. Force loop cfg
LPDDR4 probe
ddr clk to 912MHz
Load ddrfw from eMMC, src: 0x0003c200, des: 0xfffd0000, size: 0x0000c000, part: 0

dmc_version 0000
Check phy result
INFO : ERROR : Training has failed!
1D training failed
Cfg max: 5, cur: 4. Board id: 255. Force loop cfg
LPDDR4 probe
ddr clk to 792MHz
Load ddrfw from eMMC, src: 0x0003c200, des: 0xfffd0000, size: 0x0000c000, part: 0

dmc_version 0000
Check phy result
INFO : ERROR : Training has failed!
1D training failed
Cfg max: 5, cur: 5. Board id: 255. Force loop cfg
LPDDR3 probe
ddr clk to 792MHz
Load ddrfw from eMMC, src: 0x0006c200, des: 0xfffd0000, size: 0x0000c000, part: 0

dmc_version 0000
Check phy result
INFO : End of CA training
INFO : End of initialization
INFO : End of read enable training
INFO : Training has run successfully!
Check phy result
INFO : End of initialization
INFO : End of read enable training
INFO : End of fine write leveling
INFO : End of read dq deskew training
INFO : End of MPR read delay center optimization
INFO : End of Write leveling coarse delay
INFO : End of write delay center optimization
INFO : End of read delay center optimization
INFO : End of max read latency training
INFO : Training has run successfully!
1D training succeed
aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:53:31
auto size-- 65535DDR cs0 size: 1024MB
DDR cs1 size: 1024MB
DMC_DDR_CTRL: 00a0001bDDR size: 2048MB
cs0 DataBus test pass
cs1 DataBus test pass
cs0 AddrBus test pass
cs1 AddrBus test pass

100bdlr_step_size ps== 450
result report
boot times 0Enable ddr reg access
Load FIP HDR from eMMC, src: 0x00010200, des: 0x01700000, size: 0x00004000, part: 0
Load BL3X from eMMC, src: 0x00078200, des: 0x01768000, size: 0x000c4000, part: 0
bl2z: ptr: 05129330, size: 00001e40
0.0;M3 CHK:0;cm4_sp_mode 0
MVN_1=0x00000000
MVN_2=0x00000000
[Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
OPS=0x30
ring efuse init
28 0b 30 00 01 2c 13 00 00 0e 33 31 48 53 52 50 
[0.017150 Inits done]
secure task start!
high task start!
low task start!
run into bl31
NOTICE:  BL31: v1.3(release):4fc40b1
NOTICE:  BL31: Built : 15:57:33, May 22 2019
NOTICE:  BL31: G12A normal boot!
NOTICE:  BL31: BL33 decompress pass
ERROR:   Error initializing runtime service opteed_fast

U-Boot 2015.01 (Aug 17 2020 - 14:57:57)

DRAM:  2 GiB
Relocation Offset is: 76e64000
spi_post_bind(spifc): req_seq = 0
register usb cfg[0][1] = 0000000077f3fb10
NAND:  get_sys_clk_rate_mtd() 290, clock setting 200!
NAND device id: 0 ff ff ff ff ff 
No NAND device found!!!
nand init failed: -6
get_sys_clk_rate_mtd() 290, clock setting 200!
NAND device id: 0 ff ff ff ff ff 
No NAND device found!!!
nand init failed: -6
MMC:   aml_priv->desc_buf = 0x0000000073e54a70
aml_priv->desc_buf = 0x0000000073e56db0
SDIO Port B: 0, SDIO Port C: 1
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x3, tx-dly 0, clock 400000
emmc/sd response timeout, cmd8, status=0x1ff2800
emmc/sd response timeout, cmd55, status=0x1ff2800
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x3, tx-dly 0, clock 40000000
aml_sd_retry_refix[983]:delay = 0x0,gadjust =0x172000
[mmc_startup] mmc refix success
init_part() 297: PART_TYPE_AML
[mmc_init] mmc init success
      Amlogic multi-dtb tool
      GZIP format, decompress...
      Multi dtb detected
      Multi dtb tool version: v2 .
      Support 3 dtbs.
        aml_dt soc: g12a platform: u221 variant: 2g
        dtb 0 soc: g12a   plat: u221   vari: 1g
        dtb 1 soc: g12a   plat: u221   vari: 2g
        dtb 2 soc: g12a   plat: u221   vari: 4g
      Find match dtb: 1
start dts,buffer=0000000073e59620,dt_addr=0000000073e59620
get_partition_from_dts() 91: ret 0
      Amlogic multi-dtb tool
      Single dtb detected
parts: 17
00:      logo   0000000000800000 1
01:  recovery   0000000001800000 1
02:      misc   0000000000800000 1
03:      dtbo   0000000000800000 1
04:  cri_data   0000000000800000 2
05:     param   0000000001000000 2
06:      boot   0000000001000000 1
set has_boot_slot = 0
07:       rsv   0000000001000000 1
08:  metadata   0000000001000000 1
09:    vbmeta   0000000000200000 1
10:       tee   0000000002000000 1
11:    vendor   0000000046000000 1
12:       odm   0000000008000000 1
13:    system   0000000050000000 1
14:   product   0000000008000000 1
15:     cache   0000000046000000 2
16:      data   ffffffffffffffff 4
init_part() 297: PART_TYPE_AML
eMMC/TSD partition table have been checked OK!
crc32_s:0x1577dad == storage crc_pattern:0x1577dad!!!
crc32_s:0xee152b83 == storage crc_pattern:0xee152b83!!!
crc32_s:0x79f50f07 == storage crc_pattern:0x79f50f07!!!
mmc env offset: 0x4d400000 
In:    serial
Out:   serial
Err:   serial
reboot_mode=cold_boot
[store]To run cmd[emmc dtb_read 0x1000000 0x40000]
_verify_dtb_checksum()-3477: calc 5f3945bb, store 5f3945bb
_verify_dtb_checksum()-3477: calc 5f3945bb, store 5f3945bb
dtb_read()-3694: total valid 2
update_old_dtb()-3675: do nothing
      Amlogic multi-dtb tool
      GZIP format, decompress...
      Multi dtb detected
      Multi dtb tool version: v2 .
      Support 3 dtbs.
        aml_dt soc: g12a platform: u221 variant: 2g
        dtb 0 soc: g12a   plat: u221   vari: 1g
        dtb 1 soc: g12a   plat: u221   vari: 2g
        dtb 2 soc: g12a   plat: u221   vari: 4g
      Find match dtb: 1
amlkey_init() enter!
[EFUSE_MSG]keynum is 4
vpu: clk_level in dts: 7
vpu: vpu_power_on
vpu: set clk: 666667000Hz, readback: 666666667Hz(0x100)
vpu: vpu_module_init_config
vpp: vpp_init
vpp: vpp osd2 matrix rgb2yuv..............
aml_config_dtb 642
aml_config_dtb 672
co_phase = <0x00000003>
caps2 = "��"_CAP2_HS200"
status = "disabled"
status = "okay"
Net:   No ethernet found.
CONFIG_AVB2: null 
Start read misc partition datas!
info->magic = 
info->version_major = 1
info->version_minor = 0
info->slots[0].priority = 15
info->slots[0].tries_remaining = 7
info->slots[0].successful_boot = 0
info->slots[1].priority = 14
info->slots[1].tries_remaining = 7
info->slots[1].successful_boot = 0
info->crc32 = -1075449479
active slot = 0
wipe_data=successful
wipe_cache=successful
upgrade_step=2
reboot_mode:::: cold_boot
amlkey_init() enter!
amlkey_init() 71: already init!
[EFUSE_MSG]keynum is 4
[KM]Error:f[key_manage_query_size]L515:key[usid] not programed yet
[KM]Error:f[key_manage_query_size]L515:key[mac] not programed yet
[KM]Error:f[key_manage_query_size]L515:key[deviceid] not programed yet
hpd_state=1
edid preferred_mode is 1080p60hz[16]
hdr mode is 0
dv  mode is ver:0  len: 0
hdr10+ mode is 0
[OSD]load fb addr from dts:/meson-fb
[OSD]set initrd_high: 0x7f800000
[OSD]fb_addr for logo: 0x7f800000
[OSD]load fb addr from dts:/meson-fb
[OSD]fb_addr for logo: 0x7f800000
[OSD]VPP_OFIFO_SIZE:0xfff01fff
[CANVAS]canvas init
[CANVAS]addr=0x7f800000 width=3840, height=2160
[OSD]osd_hw.free_dst_data: 0,1919,0,1079
[OSD]osd1_update_disp_freescale_enable
vpp: vpp_matrix_update: 2
set hdmitx VIC = 16
config HPLL = 5940000 frac_rate = 1
HPLL: 0x3b3a04f7
HPLL: 0x1b3a04f7
HPLL: 0xdb3a04f7
config HPLL done
j = 6  vid_clk_div = 1
hdmitx: set enc for VIC: 16
hdmitx phy setting done
enc_vpu_bridge_reset[1245]
rx version is 1.4 or below  div=10
vpp: Rx hdr_info.hdr_sup_eotf_smpte_st_2084 = 0
amlkey_init() enter!
amlkey_init() 71: already init!
[EFUSE_MSG]keynum is 4
[KM]Error:f[key_manage_query_size]L515:key[usid] not programed yet
[KM]Error:f[key_manage_query_size]L515:key[mac] not programed yet
[KM]Error:f[key_manage_query_size]L515:key[deviceid] not programed yet
gpio: pin GPIOAO_3 (gpio 3) value is 1
SARADC channel(2) is 0x114.
update by key...
InUsbBurn
[MSG]sof
Set Addr 7
Get DT cfg
Get DT cfg
set CFG
sof timeout, reset usb phy tuning
superna9999 commented 3 years ago

Hi, this is not the ROM usb boot mode, it's the update mode from U-Boot.

With this mode you can use runKernel.py to boot a kernel, or chainUboot.py to chainload a mainline u-boot build (the u-boot built binary, not the one generated by aml_encrypt_g12a)