Open camoz opened 2 years ago
Hm, actually switching to a VT and back does work for bringing back the external monitor at the native resolution, I just did not wait long enough. After switching to a VT and having it display on both the internal + external monitor, I switch back to sway, but then it takes around 20 sec for the external monitor to catch the signal. Also sometimes it seems I have to do another round of VT-switching to bring it back. So, maybe it is actually the same issue as https://github.com/swaywm/wlroots/issues/2967. Now asking there (on the gitlab issue at https://gitlab.freedesktop.org/wlroots/wlroots/-/issues/2967) to clarify some further things...
sway version 1.7
Archlinux 5.17.6-arch1-1
output DP-2 mode 2560x1440
00:00:12
Hotplugging the external monitor (Dell U2520D) does not work when set to the native resolution. It (hotplugging) works when set to
1080p
though. When first starting sway (or restarting it after the issue appeared), the monitor always works fine at the native resolution. DPMS off/on, swayidle and suspend also work if the monitor stays connected and powered on.Steps to reproduce:
2560x1440
(in sway)Expected results: Monitor gets detected.
Actual results: Monitor stays black (no signal).
I can also reproduce this with
WLR_DRM_NO_MODIFIERS=1
and/orWLR_DRM_NO_ATOMIC=1
.The interesting part of the dmesg debug log is probably this
``` [11194.682811] i915 0000:00:02.0: [drm:drm_atomic_check_only] checking 000000002acc2ad7 [11194.682818] i915 0000:00:02.0: [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] mode changed [11194.682827] i915 0000:00:02.0: [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] enable changed [11194.682833] i915 0000:00:02.0: [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] active changed [11194.682843] i915 0000:00:02.0: [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:104:DP-2] [11194.682850] i915 0000:00:02.0: [drm:drm_atomic_helper_check_modeset] [CONNECTOR:104:DP-2] using [ENCODER:103:DP C] on [CRTC:75:pipe C] [11194.682858] i915 0000:00:02.0: [drm:drm_atomic_helper_check_modeset] [CRTC:75:pipe C] needs all connectors, enable: y, active: y [11194.682865] i915 0000:00:02.0: [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:75:pipe C] to 000000002acc2ad7 [11194.682871] i915 0000:00:02.0: [drm:drm_atomic_add_affected_planes] Adding all current planes for [CRTC:75:pipe C] to 000000002acc2ad7 [11194.682877] i915 0000:00:02.0: [drm:drm_atomic_add_encoder_bridges] Adding all bridges for [encoder:103:DP C] to 000000002acc2ad7 [11194.682888] i915 0000:00:02.0: [drm:intel_atomic_check [i915]] [CONNECTOR:104:DP-2] Limiting display bpp to 24 instead of EDID bpp 24, requested bpp 36, max platform bpp 36 [11194.683081] i915 0000:00:02.0: [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max rate 270000 max bpp 24 pixel clock 241500KHz [11194.683265] i915 0000:00:02.0: [drm:intel_dp_compute_config [i915]] Force DSC en = 0 [11194.683446] i915 0000:00:02.0: [drm:intel_dp_compute_config [i915]] DP lane count 4 clock 270000 bpp 24 [11194.683625] i915 0000:00:02.0: [drm:intel_dp_compute_config [i915]] DP link rate required 724500 available 1080000 [11194.683819] i915 0000:00:02.0: [drm:ilk_fdi_compute_config [i915]] checking fdi config on pipe C, lanes 3 [11194.683999] i915 0000:00:02.0: [drm:ilk_fdi_compute_config [i915]] only 2 lanes on pipe C: required 3 lanes [11194.684178] i915 0000:00:02.0: [drm:ilk_fdi_compute_config [i915]] fdi link bw constraint, reducing pipe bpp to 18 [11194.684357] i915 0000:00:02.0: [drm:ilk_fdi_compute_config [i915]] checking fdi config on pipe C, lanes 3 [11194.684536] i915 0000:00:02.0: [drm:ilk_fdi_compute_config [i915]] only 2 lanes on pipe C: required 3 lanes [11194.684715] i915 0000:00:02.0: [drm:intel_atomic_check [i915]] CRTC bw constrained, retrying [11194.684921] i915 0000:00:02.0: [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max rate 270000 max bpp 18 pixel clock 241500KHz [11194.685105] i915 0000:00:02.0: [drm:intel_dp_compute_config [i915]] Force DSC en = 0 [11194.685222] i915 0000:00:02.0: [drm:intel_dp_compute_config [i915]] DP lane count 4 clock 162000 bpp 18 [11194.685345] i915 0000:00:02.0: [drm:intel_dp_compute_config [i915]] DP link rate required 543375 available 648000 [11194.685468] i915 0000:00:02.0: [drm:ilk_fdi_compute_config [i915]] checking fdi config on pipe C, lanes 3 [11194.685591] i915 0000:00:02.0: [drm:ilk_fdi_compute_config [i915]] only 2 lanes on pipe C: required 3 lanes [11194.685713] i915 0000:00:02.0: [drm:intel_atomic_check [i915]] CRTC config failure: -22 [11194.685837] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] [CRTC:75:pipe C] enable: yes [failed] [11194.685961] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] active: yes, output_types: DP (0x80), output format: RGB [11194.686067] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 18, dithering: 0 [11194.686148] i915 0000:00:02.0: [drm:intel_dump_pipe_config [i915]] MST master transcoder:I found some similar (same?) issues:
i915
WLR_DRM_NO_MODIFIERS=1
set.If this should be reported somewhere else, can someone please tell me where to report it, ideally with a link? Thanks.