Closed colemancda closed 7 months ago
@CodaFi @compnerd If there are any Swift flags you are aware of that already exist and would solve my problem, I'd appreciate it.
I don't think that there is. This is why I had stopped the RISCV64 port that I was doing :). There was more stuff that I needed to finish off in the IRGen/LLVM side of the world. You are going to have to make code changes for that. Note that -march
is particularly important as -march=rv64gc
vs -march=rv64gcv_zihintpause
is relevant to IRGen as that impacts the subtarget features.
Well, I have it working with Soft Float since Swift 5.6, so that's doable with Buildroot. Compiling Swift for Debian riscv64
is gonna be blocked until we can specify the CPU features and ABI.
I am going try my alternative and modify RISCVTargetParser.def
and build a modified LLVM, do you think that will provide enough info to the IRGen @compnerd ?
@colemancda sorry I'm not sure what you are proposing here. I don't think it is sufficient to just modify the target parser. Also, note that with the next rebase we should be able to enable the relaxation. The -march
is something we might be able to handle similar to -mtune
and should look at how we want to handle the uarch details. I don't think that editing just the target parser is the right approach here. This is going to require a lot more careful thinking, planning, and staging.
Ok, well at least this is documented somewhere and my hours digging will help someday. Would be cool for Swift 6.0 release.
Even when specifying the arch, Swift is still being compiled targeting Soft Float. What is off is that I was able to target RVC, Soft Float
so the compressed featured is being enabled / disabled.
https://github.com/MillerTechnologyPeru/llvm-project/commit/d9a1ac34914cbc190118f858695477658cec0193
I don't think this issue is valid as described. You can pass -march
with -Xcc
to influence LLVM machine code generation in swiftc
, as discussed in this thread: https://forums.swift.org/t/targeting-specific-microarchitectures/69505
Is your feature request related to a problem? Please describe.
I'm trying to build Swift for RISCV64 where the C and CXX code is all built with the following Clang flags:
When building the Swift StdLib, the C and CXX sources are compiled and linking correctly with the Linux runtime libraries, but the Swift sources are built targeting soft float ABI and the linking phase fails. I have been able to convert the following Clang arguments to their
swiftc
equivalents:The last argument,
-march
has no equivalent with the Swift compiler. The Swift compiler should have a flag equivalent to-march
to produce code that has the same CPU features and Floating point ABI as the C code its linking against. Here is the example output I am getting withreadelf
when passing-target-cpu generic-rv64
to the Swift compiler:Meanwhile my C code like
libdispatch.so
output the following, notice the different output ofFlags
:Describe the solution you'd like A Swift compiler flag like
-target-arch
which configures the underlying LLVM instance the same way Clang's-march
does would solve my problem.Describe alternatives you've considered There is another argument
-target-cpu
which is the Swift equivalent of Clang's-march
and in some situations this can indirectly provide the desired arch targeted. For example, The Swift arguments-target-cpu sifive-e20
would be equivalent to-mcpu=sifive-e20 -march=rv32imc
with Clang. The issue that arises is that there are a lot more RISCV CPU variants with different ABIs compared to mainstream processors like x86 and ARM, and submitting an LLVM patch to modifyllvm/include/llvm/Support/RISCVTargetParser.def
for each is both impractical and likely will never be merged. I'm my case I would have to add the following entry toRISCVTargetParser.def
for building for the Allwinner D1 CPU:The default
-target-cpu generic-rv64
does not satisfy my requirements nor do the other entries in that table.Additional context I am building Swift 5.7 compiler with patches specific to enable RISCV outlined in SR-16005.