inouts cannot be bound using a bit-select syntax - Githubissues

sylefeb / Silice

Silice is an easy-to-learn, powerful hardware description language, that simplifies designing hardware algorithms with parallelism and pipelines.

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inouts cannot be bound using a bit-select syntax #258

Open sylefeb opened 10 months ago

sylefeb commented 10 months ago

See https://github.com/sylefeb/Silice/issues/108#issuecomment-1869140539

This limitation is painful and needs fixing. Current workarounds are:

breakout individual bits, e.g. https://github.com/sylefeb/Silice/blob/8842f221b155fdd255e8e517853c5c80e94db991/projects/spiflash/spiflash2x.si#L75
define a Verilog module to help, as in the SDRAM controller: https://github.com/sylefeb/Silice/blob/8842f221b155fdd255e8e517853c5c80e94db991/projects/common/sdram_controller_autoprecharge_pipelined_r512_w64.si#L109 and the corresponding Verilog module https://github.com/sylefeb/Silice/blob/8842f221b155fdd255e8e517853c5c80e94db991/projects/common/inout16_ff_ulx3s.v#L1