Compliance_breakpoint test failed when I disable breakpoint module

[henry-hsieh]

In breakpoint.S of riscv-compliance, csrw tselect, x0 will cause illegal instruction exception when the breakpoint module is disabled. I think the exception is correct because the tselect CSR isn't implemented in such configuration. Skipping the breakpoint test file in scr1_top_tb_ahb.sv (axi is similiar) is an easy method.

`ifndef SCR1_BRKM_EN
    if (~is_compliance(test_file) || get_ref_filename(test_file) != "breakpoint") begin
`endif // SCR1_BRKM_EN
        i_memory_tb.test_file = test_file;
        i_memory_tb.test_file_init = 1'b1;
        $write("\033[0;34m---Test: %s\033[0m\n", test_file);
        test_running <= 1'b1;
        rst_init <= 1'b1;
`ifndef SCR1_BRKM_EN
    end
`endif // SCR1_BRKM_EN

I didn't add string comparison of Verilator's version in above code.

[eb-sc]

If we read this correctly, you’ve made an SCR1 configuration without SCR1_BRKM_EN and want to exclude the riscv-compliance "breakpoint" test from the list for simulation using Verilator (please, confirm).

Unfortunately, we don’t think the proposed method will work as Verilator does not support all simulation features of the SystemVerilog language at the moment, in particular, the comparison of two strings. You could read more about supported features in the "Verilator manual" here: https://www.veripool.org/projects/verilator/wiki/Documentation

As a possible solution, we suggest to manually exclude this test from the list. To do this, please edit the file ./sim/tests/riscv_compliance/Makefile by adding a new line to it cut_list += breakpoint As a reference - the same was done for several incompatible riscv-compliance tests here: https://github.com/syntacore/scr1/blob/9bc6cbbbd3670040720d8e39e7f569b3f2796df6/sim/tests/riscv_compliance/Makefile#L71

Best regards, Kate

[henry-hsieh]

Actually, I used ncsim, vcs & modelsim for simulation. Apparently, the method I proposed works in these simulators except Verilator. Put the test in the cut list is the easiest way. However, the situation may need to be addressed in README or document to remind users.

[eb-sc]

Thank you for your comment. We will definitely include such a description in the next README and UM release.