Dual boot options keep appearing and disappearing in dual boot on one drive setup

Raikiri commented 3 years ago

On my Oryx Pro I wanted to have Windows 10 and to keep the stock PopOS on the same physical drive. I know it's not advised and I know I was sort of going the hard mode when I chose to, but I still gave it a try.

So before installing Windows 10, open firmware boot menu had these options: PopOS PopOS recovery Samsung EVO 1TB (name of my ssd device)

Right after installing Windows 10 I checked the boot menu again and saw this: PopOS PopOS recovery Windows Boot Loader Samsung EVO 1TB (name of my ssd device)

Then I ran a Windows Update and only this option was left: Samsung EVO 1TB

So windows 10 updater effectively has erased both its entry from the boot menu as well as the popos entry for some reason.

Choosing this single available option boots me into systemd loader where I can select either PopOS or Windows Boot Loader, but all other entries were gone from the bios boot options.

So I ran windows boot recovery thingie from its installation drive and Windows Boot Loader re-appeared in the firmware boot menu after that, but some time later, it disappeared again.

So right now I'm at the stage where I still have just the physical drive listed as my only boot option in the bios, which boots me into systemd loader where I am able to log in either Windows or PopOS, but I still expect the firmware boot menu to work as well, but its options are missing.

Am I doing something wrong? Is it working as intended? Is there a way to restore (and keep) boot options available from the firmware?

mbk5631 commented 3 years ago

This is very similar to a problem I'm running into. I have a lemp9. I have two drives, One has pop-os and the other has windows.

I was running firmware rev 2020-09-17-f10af76 from September to May. Then I updated to 2021-03-11_50eedc2 because I wanted the battery thresholds. Now it loses the windows boot loader. I can repair it through a windows USB key and it will work again for a couple reboots. Sometimes the record will persist if I boot pop-os, and sometimes it won't. Doesn't seem to matter if I am booting windows to windows, it will still lose the record sometimes.

The windows drive has bitlocker turned on, but I was able to reproduce the problem after turning off bitlocker (decrypting the drive). Obviously, running without it presents security issues on a portable device.

When it's working efibootmgr reports...

BootCurrent: 0001 Timeout: 2 seconds BootOrder: 0004,0001,0000,0002 Boot0000 UiApp MemoryMapped(11,0x840000,0xffffff)/FvFile(xxxxxxxx-xxxx-xxxx-xxxxxxxxxxxx) Boot0001 Pop!_OS 21.04 HD(1,GPT,xxxxxxxx-xxxx-xxxx-xxxxxxxxxxxx,0x800,0x100000)/File(\EFI\SYSTEMD\SYSTEMD-BOOTX64.EFI) Boot0002 Samsung SSD 970 EVO Plus 1TB PciRoot(0x0)/Pci(0x1d,0x0)/Pci(0x0,0x0)/NVMe(0x1,xx-xx-xx-xx-xx-xx-xx-xx)N.....YM....R,Y. Boot0004 Windows Boot Manager HD(1,GPT,xxxxxxxx-xxxx-xxxx-xxxxxxxxxxxx,0x800,0x100000)/File(\EFI\Microsoft\Boot\bootmgfw.efi)WINDOWS....... (there are more characters here)

When it's not working I get BootCurrent: 0001 Timeout: 2 seconds BootOrder: 0000,0001 Boot0000 UiApp MemoryMapped(11,0x840000,0xffffff)/FvFile(xxxxxxxx-xxxx-xxxx-xxxxxxxxxxxx) Boot0001 Samsung SSD 970 EVO Plus 1TB PciRoot(0x0)/Pci(0x1d,0x0)/Pci(0x0,0x0)/NVMe(0x1,xx-xx-xx-xx-xx-xx-xx-xx)N.....YM....R,Y.

jacobgkau commented 3 years ago

@mbk5631 Does the systemd-boot menu show Windows in its menu like it did for @Raikiri? If it's showing up there, I would recommend just using that.

If not, you may need to copy some Windows bootloader files into the Pop!_OS EFI partition so you can create a systemd-boot entry manually (or get the automatic one to show up.) There's a community post here that includes a copy command that might work: https://pop-planet.info/forums/threads/copy-the-microsoft-bootloader-into-pops-efi-beginners-guide.357/

mbk5631 commented 3 years ago

@jacobgkau I can select Windows using the systemd boot but it's not really a viable solution because the next step is to re-enter the BitLocker recovery key each time. It doesn't read the key from the TPM chip.

My work-around is each time I boot into Linux, which is most of the time, I run

sudo efibootmgr -c -L "Windows Boot Manager" -l "\EFI\Microsoft\Boot\bootmgfw.efi" -d /dev/nvme0n1 -p 1

Then the next reboot will show the Windows boot manager in the firmware boot menu.

mbk5631 commented 3 years ago

BTW just to clarify this is a regression. It worked in firmware from last September.

pspacek commented 3 years ago

I'm observing similar symptoms on darp7 on firmware 2021-04-07_236914e, which is I believe the last released.

In my case the boot menu "reverts" to state with just single single entry named after the SSD drive. My workaround is also re-add entries using efibootmgr, which stays there for couple reboot cycles and then disappears again.

I was not able to pinpoint and verify what is causing this "reversion", but I have a vague suspicion it has something to do with PopOS updater.

crawfxrd commented 3 years ago

When it happens, check if SMMSTORE was cleared by CMOS variable.

make -C coreboot/util/cbmem
sudo ./coreboot/util/cbmem -c > cbmem.txt
grep "CMOS reset" cbmem.txt

You can also try scripts/smmstore.sh. This will read the flash, extract the SMMSTORE region into smmstore.rom, and attempt to parse & print the variables.

mbk5631 commented 3 years ago

ok I built coreboot this morning. Here's the output of coreboot

output of

make -C coreboot/util/cbmem sudo ./coreboot/util/cbmem/cbmem -c > cbmem.txt grep "CMOS reset" cbmem.txt

was

SMMSTORE: CMOS reset, clearing store

Full text for cbmem is below. I have the output for smmstore - since I can't read most of it I'll mail it to you rather than posting it.

cbmem console


coreboot-2021-03-11_50eedc2 Thu Mar 11 22:19:48 UTC 2021 bootblock starting (log level: 7)...
CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
CPU: ID 806ec, Whiskeylake V0, ucode: 000000d5
CPU: AES supported, TXT NOT supported, VT supported
MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
PCH: device id 0284 (rev 00) is Cometlake-U Premium
IGD: device id 9b41 (rev 02) is CometLake ULT GT2
FMAP: Found "FLASH" version 1.1 at 0x450000.
FMAP: base = 0xff000000 size = 0x1000000 #areas = 5
FMAP: area COREBOOT found @ 450200 (12254720 bytes)
CBFS: mcache @0xfef21400 built for 17 files, used 0x3b8 of 0x2000 bytes
CBFS: Found 'fallback/romstage' @0x80 size 0xcb8c in mcache @0xfef21438
BS: bootblock times (exec / console): total (unknown) / 0 ms

coreboot-2021-03-11_50eedc2 Thu Mar 11 22:19:48 UTC 2021 romstage starting (log level: 7)...
pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001800
gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
gpe0_sts[3]: 00000800 gpe0_en[3]: 00000000
TCO_STS:   0000 0000
GEN_PMCON: e0015038 00000200
GBLRST_CAUSE: 00000000 00000000
prev_sleep_state 5
CBFS: Found 'fspm.bin' @0x59dc0 size 0x8e000 in mcache @0xfef2164c
POST: 0x34
FMAP: area RW_MRC_CACHE found @ 400000 (65536 bytes)
SPD INDEX = 0
CBFS: Found 'spd.bin' @0x55dc0 size 0x200 in mcache @0xfef2159c
SPD: module type is DDR4
SPD: module part number is K4AAG165WA-BCTD     
SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
SPD: device width 16 bits, bus width 64 bits
SPD: module size is 8192 MB (per channel)
memory slot: 0 configuration done.
POST: 0x36
POST: 0x92
POST: 0x98
CBMEM:
IMD: root @ 0x99eff000 254 entries.
IMD: root @ 0x99efec00 62 entries.
External stage cache:
IMD: root @ 0x9abff000 254 entries.
IMD: root @ 0x9abfec00 62 entries.
FMAP: area RW_MRC_CACHE found @ 400000 (65536 bytes)
MRC: Checking cached data update for 'RW_MRC_CACHE'.
SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
MRC: 'RW_MRC_CACHE' does not need update.
2 DIMMs found
SMM Memory Map
SMRAM       : 0x9a000000 0x1000000
 Subregion 0: 0x9a000000 0xa00000
 Subregion 1: 0x9aa00000 0x200000
 Subregion 2: 0x9ac00000 0x400000
top_of_ram = 0x9a000000
MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
MTRR Range: Start=ff000000 End=0 (Size 1000000)
CBFS: Found 'fallback/postcar' @0x117680 size 0x4dd0 in mcache @0xfef21704
Decompressing stage fallback/postcar @ 0x99b21fc0 (36336 bytes)
Loading module at 0x99b22000 with entry 0x99b22031. filesize: 0x4a90 memsize: 0x8db0
Processing 185 relocs. Offset value of 0x97b22000
BS: romstage times (exec / console): total (unknown) / 1 ms

coreboot-2021-03-11_50eedc2 Thu Mar 11 22:19:48 UTC 2021 postcar starting (log level: 7)...
CBFS: Found 'fallback/ramstage' @0x3c500 size 0x192c7 in mcache @0x99b4d0ec
Decompressing stage fallback/ramstage @ 0x99ad0fc0 (326832 bytes)
Loading module at 0x99ad1000 with entry 0x99ad1000. filesize: 0x36288 memsize: 0x4fc70
Processing 3626 relocs. Offset value of 0x98cd1000
BS: postcar times (exec / console): total (unknown) / 0 ms

coreboot-2021-03-11_50eedc2 Thu Mar 11 22:19:48 UTC 2021 ramstage starting (log level: 7)...
POST: 0x39
POST: 0x80
Normal boot
POST: 0x70
CBFS: Found 'cpu_microcode_blob.bin' @0xcc80 size 0x2f800 in mcache @0x99b4d09c
microcode: sig=0x806ec pf=0x4 revision=0xd5
Skip microcode update
CBFS: Found 'fsps.bin' @0xe8dc0 size 0x2e85f in mcache @0x99b4d2c4
Detected 4 core, 8 thread CPU.
Setting up SMI for CPU
IED base = 0x9ac00000
IED size = 0x00400000
Will perform SMM setup.
CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
Processing 16 relocs. Offset value of 0x00030000
Attempting to start 7 APs
Waiting for 10ms after sending INIT.
Waiting for 1st SIPI to complete...done.
Waiting for 2nd SIPI to complete...done.
AP: slot 1 apic_id 1.
AP: slot 2 apic_id 2.
AP: slot 4 apic_id 3.
AP: slot 3 apic_id 5.
AP: slot 5 apic_id 4.
AP: slot 6 apic_id 7.
AP: slot 7 apic_id 6.
Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
Processing 13 relocs. Offset value of 0x00038000
SMM Module: stub loaded at 0x00038000. Will call 0x99ae902e(0x00000000)
Installing permanent SMM handler to 0x9a000000
Loading module at 0x9a010000 with entry 0x9a010b58. filesize: 0x2b48 memsize: 0x6c20
Processing 165 relocs. Offset value of 0x9a010000
Loading module at 0x9a008000 with entry 0x9a008000. filesize: 0x1b8 memsize: 0x1b8
Processing 13 relocs. Offset value of 0x9a008000
SMM Module: placing jmp sequence at 0x9a007c00 rel16 0x03fd
SMM Module: placing jmp sequence at 0x9a007800 rel16 0x07fd
SMM Module: placing jmp sequence at 0x9a007400 rel16 0x0bfd
SMM Module: placing jmp sequence at 0x9a007000 rel16 0x0ffd
SMM Module: placing jmp sequence at 0x9a006c00 rel16 0x13fd
SMM Module: placing jmp sequence at 0x9a006800 rel16 0x17fd
SMM Module: placing jmp sequence at 0x9a006400 rel16 0x1bfd
SMM Module: stub loaded at 0x9a008000. Will call 0x9a010b58(0x00000000)
Clearing SMI status registers
SMI_STS: PM1 
PWRBTN GPE0 STD STS: PME 
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x9a000000, cpu = 0
In relocation handler: CPU 0
New SMBASE=0x9a000000 IEDBASE=0x9ac00000
Writing SMRR. base = 0x9a000006, mask=0xff000800
Relocation complete.
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x99fffc00, cpu = 1
In relocation handler: CPU 1
New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
Writing SMRR. base = 0x9a000006, mask=0xff000800
Relocation complete.
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x99ffe400, cpu = 7
In relocation handler: CPU 7
New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
Writing SMRR. base = 0x9a000006, mask=0xff000800
Relocation complete.
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x99ffe800, cpu = 6
In relocation handler: CPU 6
New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
Writing SMRR. base = 0x9a000006, mask=0xff000800
Relocation complete.
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x99ffec00, cpu = 5
In relocation handler: CPU 5
New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
Writing SMRR. base = 0x9a000006, mask=0xff000800
Relocation complete.
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x99fff400, cpu = 3
In relocation handler: CPU 3
New SMBASE=0x99fff400 IEDBASE=0x9ac00000
Writing SMRR. base = 0x9a000006, mask=0xff000800
Relocation complete.
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x99fff800, cpu = 2
In relocation handler: CPU 2
New SMBASE=0x99fff800 IEDBASE=0x9ac00000
Writing SMRR. base = 0x9a000006, mask=0xff000800
Relocation complete.
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x99fff000, cpu = 4
In relocation handler: CPU 4
New SMBASE=0x99fff000 IEDBASE=0x9ac00000
Writing SMRR. base = 0x9a000006, mask=0xff000800
Relocation complete.
Initializing CPU #0
CPU: vendor Intel device 806ec
CPU: family 06, model 8e, stepping 0c
Clearing out pending MCEs
Setting up local APIC...
 apic_id: 0x00 done.
Turbo is available but hidden
Turbo is available and visible
VMX status: enabled
IA32_FEATURE_CONTROL status: locked
Skip microcode update
CPU #0 initialized
Initializing CPU #1
Initializing CPU #6
Initializing CPU #7
CPU: vendor Intel device 806ec
CPU: family 06, model 8e, stepping 0c
CPU: vendor Intel device 806ec
CPU: family 06, model 8e, stepping 0c
Clearing out pending MCEs
Clearing out pending MCEs
CPU: vendor Intel device 806ec
CPU: family 06, model 8e, stepping 0c
Clearing out pending MCEs
Initializing CPU #4
Initializing CPU #2
CPU: vendor Intel device 806ec
CPU: family 06, model 8e, stepping 0c
CPU: vendor Intel device 806ec
CPU: family 06, model 8e, stepping 0c
Clearing out pending MCEs
Clearing out pending MCEs
Initializing CPU #5
Initializing CPU #3
CPU: vendor Intel device 806ec
CPU: family 06, model 8e, stepping 0c
Setting up local APIC...
Setting up local APIC...
Clearing out pending MCEs
CPU: vendor Intel device 806ec
CPU: family 06, model 8e, stepping 0c
 apic_id: 0x07 done.
Setting up local APIC...
 apic_id: 0x01 done.
Clearing out pending MCEs
Setting up local APIC...
 apic_id: 0x06 done.
 apic_id: 0x02 Setting up local APIC...
done.
Setting up local APIC...
 apic_id: 0x03 done.
VMX status: enabled
 apic_id: 0x04 done.
IA32_FEATURE_CONTROL status: locked
VMX status: enabled
Skip microcode update
CPU #1 initialized
IA32_FEATURE_CONTROL status: locked
Setting up local APIC...
Skip microcode update
CPU #6 initialized
VMX status: enabled
VMX status: enabled
IA32_FEATURE_CONTROL status: locked
 apic_id: 0x05 done.
VMX status: enabled
IA32_FEATURE_CONTROL status: locked
Skip microcode update
CPU #7 initialized
VMX status: enabled
Skip microcode update
CPU #2 initialized
IA32_FEATURE_CONTROL status: locked
IA32_FEATURE_CONTROL status: locked
Skip microcode update
CPU #4 initialized
Skip microcode update
CPU #5 initialized
VMX status: enabled
IA32_FEATURE_CONTROL status: locked
Skip microcode update
CPU #3 initialized
bsp_do_flight_plan done after 6 msecs.
CPU: frequency set to 4200 MHz
Enabling SMIs.
Locking SMM.
BS: BS_DEV_INIT_CHIPS entry times (exec / console): 55 / 1 ms
POST: 0x71
CBFS: Found 'vbt.bin' @0xe7e00 size 0x499 in mcache @0x99b4d28c
Found a VBT of 4608 bytes after decompression
gpio_pad_reset_config_override: Logical to Chipset mapping not found
POST: 0x93
FSPS returned 0
POST: 0x99
Display FSP Version Info HOB
Reference Code - CPU = 9.0.30.50
uCode Version = 0.0.0.d6
TXT ACM version = ff.ff.ff.ffff
Reference Code - ME = 9.0.30.50
MEBx version = 0.0.0.0
ME Firmware Version = Consumer SKU
Reference Code - CML PCH = 9.0.30.50
PCH-CRID Status = Disabled
PCH-CRID Original Value = ff.ff.ff.ffff
PCH-CRID New Value = ff.ff.ff.ffff
OPROM - RST - RAID = ff.ff.ff.ffff
ChipsetInit Base Version = ff.ff.ff.ffff
ChipsetInit Oem Version = ff.ff.ff.ffff
Reference Code - SA - System Agent = 9.0.30.50
Reference Code - MRC = 0.0.0.45
SA - PCIe Version = 9.0.30.50
SA-CRID Status = Disabled
SA-CRID Original Value = 0.0.0.c
SA-CRID New Value = 0.0.0.c
OPROM - VBIOS = ff.ff.ff.ffff
gpio_pad_reset_config_override: Logical to Chipset mapping not found
Found PCIe Root Port #6 at PCI: 00:1c.0.
Found PCIe Root Port #9 at PCI: 00:1d.0.
Found PCIe Root Port #13 at PCI: 00:1d.4.
Remapping PCIe Root Port #6 from PCI: 00:1c.5 to new function number 0.
pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
BS: BS_DEV_INIT_CHIPS run times (exec / console): 261 / 0 ms
RTC Init
No CMOS option 'power_on_after_fail'.
Set power on after power failure.
Disabling Deep S3
Disabling Deep S3
Disabling Deep S4
Disabling Deep S4
Disabling Deep S5
Disabling Deep S5
BS: BS_DEV_INIT_CHIPS exit times (exec / console): 3 / 0 ms
POST: 0x72
Enumerating buses...
Root Device scanning...
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
POST: 0x24
PCI: 00:00.0 [8086/9b61] enabled
PCI: 00:02.0 [8086/9b41] enabled
PCI: 00:04.0 [8086/1903] enabled
PCI: 00:08.0 [8086/1911] enabled
PCI: 00:12.0 [8086/02f9] enabled
PCI: 00:14.0 [8086/02ed] enabled
PCI: 00:14.2 [8086/02ef] enabled
PCI: 00:14.3 [8086/02f0] enabled
PCI: 00:15.0 [8086/02e8] enabled
PCI: 00:16.0 [8086/02e0] disabled
PCI: Static device PCI: 00:17.0 not found, disabling it.
PCI: 00:19.0 [8086/02c5] disabled
PCI: 00:19.2 [8086/02c7] enabled
PCI: 00:1c.0 [8086/02bd] enabled
PCI: 00:1d.0 [8086/02b0] enabled
PCI: 00:1d.4 [8086/02b4] enabled
PCI: 00:1f.0 [8086/0284] enabled
PCI: 00:1f.3 [8086/02c8] enabled
PCI: 00:1f.4 [8086/02a3] enabled
PCI: 00:1f.5 [8086/02a4] enabled
POST: 0x25
PCI: Leftover static devices:
PCI: 00:12.5
PCI: 00:12.6
PCI: 00:13.0
PCI: 00:14.1
PCI: 00:14.5
PCI: 00:15.1
PCI: 00:15.2
PCI: 00:15.3
PCI: 00:16.1
PCI: 00:16.2
PCI: 00:16.3
PCI: 00:16.4
PCI: 00:16.5
PCI: 00:17.0
PCI: 00:19.1
PCI: 00:1a.0
PCI: 00:1e.0
PCI: 00:1e.1
PCI: 00:1e.2
PCI: 00:1e.3
PCI: 00:1f.1
PCI: 00:1f.2
PCI: 00:1f.6
PCI: Check your devicetree.cb.
PCI: 00:02.0 scanning...
scan_bus: bus PCI: 00:02.0 finished in 0 msecs
PCI: 00:14.0 scanning...
scan_bus: bus PCI: 00:14.0 finished in 0 msecs
PCI: 00:14.3 scanning...
GENERIC: 0.0 enabled
scan_bus: bus PCI: 00:14.3 finished in 0 msecs
PCI: 00:15.0 scanning...
I2C: 00:15 enabled
scan_bus: bus PCI: 00:15.0 finished in 0 msecs
PCI: 00:1c.0 scanning...
PCI: pci_scan_bus for bus 01
POST: 0x24
PCI: 01:00.0 [10ec/522a] enabled
POST: 0x25
POST: 0x55
Enabling Common Clock Configuration
L1 Sub-State supported from root port 28
L1 Sub-State Support = 0xf
CommonModeRestoreTime = 0x3c
Power On Value = 0x6, Power On Scale = 0x1
ASPM: Enabled L0s and L1
PCIe: Max_Payload_Size adjusted to 128
scan_bus: bus PCI: 00:1c.0 finished in 0 msecs
PCI: 00:1d.0 scanning...
PCI: pci_scan_bus for bus 02
POST: 0x24
PCI: 02:00.0 [144d/a808] enabled
POST: 0x25
POST: 0x55
Enabling Common Clock Configuration
L1 Sub-State supported from root port 29
L1 Sub-State Support = 0xf
CommonModeRestoreTime = 0x28
Power On Value = 0x16, Power On Scale = 0x0
ASPM: Enabled L1
PCIe: Max_Payload_Size adjusted to 128
scan_bus: bus PCI: 00:1d.0 finished in 0 msecs
PCI: 00:1d.4 scanning...
PCI: pci_scan_bus for bus 03
POST: 0x24
PCI: 03:00.0 [144d/a808] enabled
POST: 0x25
POST: 0x55
Enabling Common Clock Configuration
L1 Sub-State supported from root port 29
L1 Sub-State Support = 0xf
CommonModeRestoreTime = 0x28
Power On Value = 0x16, Power On Scale = 0x0
ASPM: Enabled L1
PCIe: Max_Payload_Size adjusted to 128
scan_bus: bus PCI: 00:1d.4 finished in 0 msecs
PCI: 00:1f.0 scanning...
PNP: 0c31.0 enabled
scan_bus: bus PCI: 00:1f.0 finished in 0 msecs
PCI: 00:1f.3 scanning...
scan_bus: bus PCI: 00:1f.3 finished in 0 msecs
PCI: 00:1f.4 scanning...
scan_bus: bus PCI: 00:1f.4 finished in 0 msecs
PCI: 00:1f.5 scanning...
scan_bus: bus PCI: 00:1f.5 finished in 0 msecs
POST: 0x55
scan_bus: bus DOMAIN: 0000 finished in 1 msecs
scan_bus: bus Root Device finished in 1 msecs
done
BS: BS_DEV_ENUMERATE run times (exec / console): 1 / 0 ms
MRC: Could not find region 'UNIFIED_MRC_CACHE'
FMAP: area RW_MRC_CACHE found @ 400000 (65536 bytes)
MRC: NOT enabling PRR for 'RW_MRC_CACHE'.
POST: 0x73
found VGA at PCI: 00:02.0
Setting up VGA for PCI: 00:02.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Done reading resources.
==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
 PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff
 PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff done
 PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
  PCI: 01:00.0 10 *  [0x0 - 0xfff] mem
 PCI: 00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
 PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
  PCI: 02:00.0 10 *  [0x0 - 0x3fff] mem
 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 PCI: 00:1d.4 io: size: 0 align: 12 gran: 12 limit: ffff
 PCI: 00:1d.4 io: size: 0 align: 12 gran: 12 limit: ffff done
 PCI: 00:1d.4 mem: size: 0 align: 20 gran: 20 limit: ffffffff
  PCI: 03:00.0 10 *  [0x0 - 0x3fff] mem
 PCI: 00:1d.4 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
 PCI: 00:1d.4 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 PCI: 00:1d.4 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
=== Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
 update_constraints: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
 update_constraints: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
 DOMAIN: 0000: Resource ranges:
 * Base: 1000, Size: 800, Tag: 100
 * Base: 1900, Size: d6a0, Tag: 100
 * Base: efc0, Size: 1040, Tag: 100
  PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
 update_constraints: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
 update_constraints: PCI: 00:00.0 01 base fed10000 limit fed17fff mem (fixed)
 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
 update_constraints: PCI: 00:00.0 04 base fc000000 limit fc000fff mem (fixed)
 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
 update_constraints: PCI: 00:00.0 06 base fe000000 limit fe00ffff mem (fixed)
 update_constraints: PCI: 00:00.0 07 base fed90000 limit fed90fff mem (fixed)
 update_constraints: PCI: 00:00.0 08 base fed91000 limit fed91fff mem (fixed)
 update_constraints: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
 update_constraints: PCI: 00:00.0 0a base 000c0000 limit 99efffff mem (fixed)
 update_constraints: PCI: 00:00.0 0b base 99f00000 limit 9f7fffff mem (fixed)
 update_constraints: PCI: 00:00.0 0c base 100000000 limit a5e7fffff mem (fixed)
 update_constraints: PCI: 00:00.0 0d base 000a0000 limit 000bffff mem (fixed)
 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 000fffff mem (fixed)
 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
 update_constraints: PNP: 0c31.0 00 base fed40000 limit fed44fff mem (fixed)
 DOMAIN: 0000: Resource ranges:
 * Base: 9f800000, Size: 40800000, Tag: 200
 * Base: f0000000, Size: c000000, Tag: 200
 * Base: fc001000, Size: 1fff000, Tag: 200
 * Base: fe010000, Size: 22000, Tag: 200
 * Base: fe033000, Size: cdd000, Tag: 200
 * Base: fed18000, Size: 28000, Tag: 200
 * Base: fed45000, Size: 3b000, Tag: 200
 * Base: fed84000, Size: c000, Tag: 200
 * Base: fed92000, Size: e000, Tag: 200
 * Base: feda2000, Size: 125e000, Tag: 200
 * Base: a5e800000, Size: 75a1800000, Tag: 100200
  PCI: 00:02.0 18 *  [0xa0000000 - 0xafffffff] limit: afffffff prefmem
  PCI: 00:02.0 10 *  [0xb0000000 - 0xb0ffffff] limit: b0ffffff mem
  PCI: 00:1c.0 20 *  [0x9f800000 - 0x9f8fffff] limit: 9f8fffff mem
  PCI: 00:1d.0 20 *  [0x9f900000 - 0x9f9fffff] limit: 9f9fffff mem
  PCI: 00:1d.4 20 *  [0x9fa00000 - 0x9fafffff] limit: 9fafffff mem
  PCI: 00:1f.3 20 *  [0x9fb00000 - 0x9fbfffff] limit: 9fbfffff mem
  PCI: 00:14.0 10 *  [0x9fc00000 - 0x9fc0ffff] limit: 9fc0ffff mem
  PCI: 00:04.0 10 *  [0x9fc10000 - 0x9fc17fff] limit: 9fc17fff mem
  PCI: 00:14.3 10 *  [0x9fc18000 - 0x9fc1bfff] limit: 9fc1bfff mem
  PCI: 00:1f.3 10 *  [0x9fc1c000 - 0x9fc1ffff] limit: 9fc1ffff mem
  PCI: 00:14.2 10 *  [0x9fc20000 - 0x9fc21fff] limit: 9fc21fff mem
  PCI: 00:08.0 10 *  [0x9fc22000 - 0x9fc22fff] limit: 9fc22fff mem
  PCI: 00:12.0 10 *  [0x9fc23000 - 0x9fc23fff] limit: 9fc23fff mem
  PCI: 00:14.2 18 *  [0x9fc24000 - 0x9fc24fff] limit: 9fc24fff mem
  PCI: 00:15.0 10 *  [0x9fc25000 - 0x9fc25fff] limit: 9fc25fff mem
  PCI: 00:19.2 18 *  [0x9fc26000 - 0x9fc26fff] limit: 9fc26fff mem
  PCI: 00:1f.5 10 *  [0x9fc27000 - 0x9fc27fff] limit: 9fc27fff mem
  PCI: 00:1f.4 10 *  [0x9fc28000 - 0x9fc280ff] limit: 9fc280ff mem
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
PCI: 00:1c.0 mem: base: 9f800000 size: 100000 align: 20 gran: 20 limit: 9f8fffff
 PCI: 00:1c.0: Resource ranges:
 * Base: 9f800000, Size: 100000, Tag: 200
  PCI: 01:00.0 10 *  [0x9f800000 - 0x9f800fff] limit: 9f800fff mem
PCI: 00:1c.0 mem: base: 9f800000 size: 100000 align: 20 gran: 20 limit: 9f8fffff done
PCI: 00:1d.0 mem: base: 9f900000 size: 100000 align: 20 gran: 20 limit: 9f9fffff
 PCI: 00:1d.0: Resource ranges:
 * Base: 9f900000, Size: 100000, Tag: 200
  PCI: 02:00.0 10 *  [0x9f900000 - 0x9f903fff] limit: 9f903fff mem
PCI: 00:1d.0 mem: base: 9f900000 size: 100000 align: 20 gran: 20 limit: 9f9fffff done
PCI: 00:1d.4 mem: base: 9fa00000 size: 100000 align: 20 gran: 20 limit: 9fafffff
 PCI: 00:1d.4: Resource ranges:
 * Base: 9fa00000, Size: 100000, Tag: 200
  PCI: 03:00.0 10 *  [0x9fa00000 - 0x9fa03fff] limit: 9fa03fff mem
PCI: 00:1d.4 mem: base: 9fa00000 size: 100000 align: 20 gran: 20 limit: 9fafffff done
=== Resource allocator: DOMAIN: 0000 - resource allocation complete ===
PCI: 00:02.0 10 <- [0x00b0000000 - 0x00b0ffffff] size 0x01000000 gran 0x18 mem64
PCI: 00:02.0 18 <- [0x00a0000000 - 0x00afffffff] size 0x10000000 gran 0x1c prefmem64
PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
PCI: 00:04.0 10 <- [0x009fc10000 - 0x009fc17fff] size 0x00008000 gran 0x0f mem64
PCI: 00:08.0 10 <- [0x009fc22000 - 0x009fc22fff] size 0x00001000 gran 0x0c mem64
PCI: 00:12.0 10 <- [0x009fc23000 - 0x009fc23fff] size 0x00001000 gran 0x0c mem64
PCI: 00:14.0 10 <- [0x009fc00000 - 0x009fc0ffff] size 0x00010000 gran 0x10 mem64
PCI: 00:14.2 10 <- [0x009fc20000 - 0x009fc21fff] size 0x00002000 gran 0x0d mem64
PCI: 00:14.2 18 <- [0x009fc24000 - 0x009fc24fff] size 0x00001000 gran 0x0c mem64
PCI: 00:14.3 10 <- [0x009fc18000 - 0x009fc1bfff] size 0x00004000 gran 0x0e mem64
PCI: 00:15.0 10 <- [0x009fc25000 - 0x009fc25fff] size 0x00001000 gran 0x0c mem64
PCI: 00:19.2 18 <- [0x009fc26000 - 0x009fc26fff] size 0x00001000 gran 0x0c mem64
PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:1c.0 20 <- [0x009f800000 - 0x009f8fffff] size 0x00100000 gran 0x14 bus 01 mem
PCI: 01:00.0 10 <- [0x009f800000 - 0x009f800fff] size 0x00001000 gran 0x0c mem
PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:1d.0 20 <- [0x009f900000 - 0x009f9fffff] size 0x00100000 gran 0x14 bus 02 mem
PCI: 02:00.0 10 <- [0x009f900000 - 0x009f903fff] size 0x00004000 gran 0x0e mem64
PCI: 00:1d.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io
PCI: 00:1d.4 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 03 prefmem
PCI: 00:1d.4 20 <- [0x009fa00000 - 0x009fafffff] size 0x00100000 gran 0x14 bus 03 mem
PCI: 03:00.0 10 <- [0x009fa00000 - 0x009fa03fff] size 0x00004000 gran 0x0e mem64
PCI: 00:1f.3 10 <- [0x009fc1c000 - 0x009fc1ffff] size 0x00004000 gran 0x0e mem64
PCI: 00:1f.3 20 <- [0x009fb00000 - 0x009fbfffff] size 0x00100000 gran 0x14 mem64
PCI: 00:1f.4 10 <- [0x009fc28000 - 0x009fc280ff] size 0x00000100 gran 0x08 mem64
PCI: 00:1f.5 10 <- [0x009fc27000 - 0x009fc27fff] size 0x00001000 gran 0x0c mem
Done setting resources.
Done allocating resources.
BS: BS_DEV_RESOURCES run times (exec / console): 1 / 0 ms
POST: 0x94
POST: 0x94
POST: 0x74
Enabling resources...
PCI: 00:00.0 subsystem <- 1558/1401
PCI: 00:00.0 cmd <- 06
PCI: 00:02.0 subsystem <- 1558/1401
PCI: 00:02.0 cmd <- 03
PCI: 00:04.0 subsystem <- 1558/1401
PCI: 00:04.0 cmd <- 02
PCI: 00:08.0 cmd <- 06
PCI: 00:12.0 subsystem <- 1558/1401
PCI: 00:12.0 cmd <- 02
PCI: 00:14.0 subsystem <- 1558/1401
PCI: 00:14.0 cmd <- 02
PCI: 00:14.2 cmd <- 02
PCI: 00:14.3 subsystem <- 1558/1401
PCI: 00:14.3 cmd <- 02
PCI: 00:15.0 subsystem <- 1558/1401
PCI: 00:15.0 cmd <- 02
PCI: 00:19.2 subsystem <- 1558/1401
PCI: 00:19.2 cmd <- 06
PCI: 00:1c.0 bridge ctrl <- 0013
PCI: 00:1c.0 subsystem <- 1558/1401
PCI: 00:1c.0 cmd <- 06
PCI: 00:1d.0 bridge ctrl <- 0013
PCI: 00:1d.0 subsystem <- 1558/1401
PCI: 00:1d.0 cmd <- 06
PCI: 00:1d.4 bridge ctrl <- 0013
PCI: 00:1d.4 subsystem <- 1558/1401
PCI: 00:1d.4 cmd <- 06
PCI: 00:1f.0 subsystem <- 1558/1401
PCI: 00:1f.0 cmd <- 07
PCI: 00:1f.3 subsystem <- 1558/1401
PCI: 00:1f.3 cmd <- 02
PCI: 00:1f.4 subsystem <- 1558/1401
PCI: 00:1f.4 cmd <- 03
PCI: 00:1f.5 subsystem <- 1558/1401
PCI: 00:1f.5 cmd <- 406
PCI: 01:00.0 subsystem <- 1558/1401
PCI: 01:00.0 cmd <- 02
PCI: 02:00.0 subsystem <- 1558/1401
PCI: 02:00.0 cmd <- 02
PCI: 03:00.0 subsystem <- 1558/1401
PCI: 03:00.0 cmd <- 02
done.
Found TPM SLB9670 TT 2.0 by Infineon
tlcl_send_startup: Startup return code is 0
TPM: setup succeeded
BS: BS_DEV_INIT entry times (exec / console): 12 / 0 ms
POST: 0x75
Initializing devices...
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
PCI: 00:00.0 init
CPU TDP = 15 Watts
CPU PL1 = 20 Watts
CPU PL2 = 30 Watts
PCI: 00:00.0 init finished in 1 msecs
POST: 0x75
PCI: 00:02.0 init
GMA: Found VBT in CBFS
GMA: Found valid VBT in CBFS
framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
                   x_res x y_res: 1920 x 1080, size: 8294400 at 0xa0000000
PCI: 00:02.0 init finished in 0 msecs
POST: 0x75
PCI: 00:04.0 init
PCI: 00:04.0 init finished in 0 msecs
POST: 0x75
PCI: 00:08.0 init
PCI: 00:08.0 init finished in 0 msecs
POST: 0x75
PCI: 00:12.0 init
PCI: 00:12.0 init finished in 0 msecs
POST: 0x75
PCI: 00:14.0 init
PCI: 00:14.0 init finished in 0 msecs
POST: 0x75
PCI: 00:14.2 init
PCI: 00:14.2 init finished in 0 msecs
POST: 0x75
POST: 0x75
PCI: 00:15.0 init
I2C bus 0 version 0x3132322a
DW I2C bus 0 at 0x9fc25000 (400 KHz)
PCI: 00:15.0 init finished in 0 msecs
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
PCI: 00:1c.0 init
Initializing PCH PCIe bridge.
PCI: 00:1c.0 init finished in 0 msecs
POST: 0x75
PCI: 00:1d.0 init
Initializing PCH PCIe bridge.
PCI: 00:1d.0 init finished in 0 msecs
POST: 0x75
PCI: 00:1d.4 init
Initializing PCH PCIe bridge.
PCI: 00:1d.4 init finished in 0 msecs
POST: 0x75
PCI: 00:1f.0 init
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: ID = 0x02
PCI: 00:1f.0 init finished in 0 msecs
POST: 0x75
PCI: 00:1f.3 init
HDA: codec_mask = 05
HDA: Initializing codec #2
HDA: codec viddid: 8086280b
HDA: verb loaded.
HDA: Initializing codec #0
HDA: codec viddid: 10ec0293
HDA: verb loaded.
PCI: 00:1f.3 init finished in 5 msecs
POST: 0x75
PCI: 00:1f.4 init
PCI: 00:1f.4 init finished in 0 msecs
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
PCI: 01:00.0 init
PCI: 01:00.0 init finished in 0 msecs
POST: 0x75
PCI: 02:00.0 init
PCI: 02:00.0 init finished in 0 msecs
POST: 0x75
PCI: 03:00.0 init
PCI: 03:00.0 init finished in 0 msecs
POST: 0x75
Devices initialized
BS: BS_DEV_INIT run times (exec / console): 7 / 0 ms
Disabling ACPI via APMC.
APMC done.
POST: 0x76
Finalize devices...
Devices finalized
POST: 0x77
ME: send disable message
HECI: No CSE device
POST: 0x79
POST: 0x9c
CBFS: Found 'fallback/dsdt.aml' @0x56000 size 0x37de in mcache @0x99b4d1c4
CBFS: 'fallback/slic' not found.
ACPI: Writing ACPI tables at 99a5d000.
ACPI:    * FACS
ACPI:    * DSDT
PCI space above 4GB MMIO is at 0xa5e800000, len = 0x75a1800000
ACPI:    * FADT
SCI is IRQ9
ACPI: added table 1/32, length now 40
ACPI:     * SSDT
Found 1 CPU(s) with 4/8 physical/logical core(s) each.
PSS: 1601MHz power 15000 control 0x2a00 status 0x2a00
PSS: 1600MHz power 15000 control 0x1000 status 0x1000
PSS: 1400MHz power 12823 control 0xe00 status 0xe00
PSS: 1200MHz power 10732 control 0xc00 status 0xc00
PSS: 1000MHz power 8737 control 0xa00 status 0xa00
PSS: 800MHz power 6832 control 0x800 status 0x800
PSS: 600MHz power 5000 control 0x600 status 0x600
PSS: 400MHz power 3255 control 0x400 status 0x400
PSS: 1601MHz power 15000 control 0x2a00 status 0x2a00
PSS: 1600MHz power 15000 control 0x1000 status 0x1000
PSS: 1400MHz power 12823 control 0xe00 status 0xe00
PSS: 1200MHz power 10732 control 0xc00 status 0xc00
PSS: 1000MHz power 8737 control 0xa00 status 0xa00
PSS: 800MHz power 6832 control 0x800 status 0x800
PSS: 600MHz power 5000 control 0x600 status 0x600
PSS: 400MHz power 3255 control 0x400 status 0x400
PSS: 1601MHz power 15000 control 0x2a00 status 0x2a00
PSS: 1600MHz power 15000 control 0x1000 status 0x1000
PSS: 1400MHz power 12823 control 0xe00 status 0xe00
PSS: 1200MHz power 10732 control 0xc00 status 0xc00
PSS: 1000MHz power 8737 control 0xa00 status 0xa00
PSS: 800MHz power 6832 control 0x800 status 0x800
PSS: 600MHz power 5000 control 0x600 status 0x600
PSS: 400MHz power 3255 control 0x400 status 0x400
PSS: 1601MHz power 15000 control 0x2a00 status 0x2a00
PSS: 1600MHz power 15000 control 0x1000 status 0x1000
PSS: 1400MHz power 12823 control 0xe00 status 0xe00
PSS: 1200MHz power 10732 control 0xc00 status 0xc00
PSS: 1000MHz power 8737 control 0xa00 status 0xa00
PSS: 800MHz power 6832 control 0x800 status 0x800
PSS: 600MHz power 5000 control 0x600 status 0x600
PSS: 400MHz power 3255 control 0x400 status 0x400
PSS: 1601MHz power 15000 control 0x2a00 status 0x2a00
PSS: 1600MHz power 15000 control 0x1000 status 0x1000
PSS: 1400MHz power 12823 control 0xe00 status 0xe00
PSS: 1200MHz power 10732 control 0xc00 status 0xc00
PSS: 1000MHz power 8737 control 0xa00 status 0xa00
PSS: 800MHz power 6832 control 0x800 status 0x800
PSS: 600MHz power 5000 control 0x600 status 0x600
PSS: 400MHz power 3255 control 0x400 status 0x400
PSS: 1601MHz power 15000 control 0x2a00 status 0x2a00
PSS: 1600MHz power 15000 control 0x1000 status 0x1000
PSS: 1400MHz power 12823 control 0xe00 status 0xe00
PSS: 1200MHz power 10732 control 0xc00 status 0xc00
PSS: 1000MHz power 8737 control 0xa00 status 0xa00
PSS: 800MHz power 6832 control 0x800 status 0x800
PSS: 600MHz power 5000 control 0x600 status 0x600
PSS: 400MHz power 3255 control 0x400 status 0x400
PSS: 1601MHz power 15000 control 0x2a00 status 0x2a00
PSS: 1600MHz power 15000 control 0x1000 status 0x1000
PSS: 1400MHz power 12823 control 0xe00 status 0xe00
PSS: 1200MHz power 10732 control 0xc00 status 0xc00
PSS: 1000MHz power 8737 control 0xa00 status 0xa00
PSS: 800MHz power 6832 control 0x800 status 0x800
PSS: 600MHz power 5000 control 0x600 status 0x600
PSS: 400MHz power 3255 control 0x400 status 0x400
PSS: 1601MHz power 15000 control 0x2a00 status 0x2a00
PSS: 1600MHz power 15000 control 0x1000 status 0x1000
PSS: 1400MHz power 12823 control 0xe00 status 0xe00
PSS: 1200MHz power 10732 control 0xc00 status 0xc00
PSS: 1000MHz power 8737 control 0xa00 status 0xa00
PSS: 800MHz power 6832 control 0x800 status 0x800
PSS: 600MHz power 5000 control 0x600 status 0x600
PSS: 400MHz power 3255 control 0x400 status 0x400
\_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
\_SB.PCI0.I2C0.H015: ELAN Touchpad at I2C: 00:15
\_SB.PCI0.LPCB.TPM.TPM: LPC TPM PNP: 0c31.0
ACPI: added table 2/32, length now 44
ACPI:    * MCFG
ACPI: added table 3/32, length now 48
ACPI:    * TPM2
TPM2 log created at 0x99a4d000
ACPI: added table 4/32, length now 52
ACPI:     * LPIT
ACPI: added table 5/32, length now 56
ACPI:    * MADT
SCI is IRQ9
ACPI: added table 6/32, length now 60
current = 99a62600
ACPI:    * DMAR
ACPI: added table 7/32, length now 64
ACPI: added table 8/32, length now 68
ACPI:    * HPET
ACPI: added table 9/32, length now 72
ACPI: done.
ACPI tables: 22320 bytes.
smbios_write_tables: 99a4c000
SMBIOS firmware version is set to coreboot_version: '2021-03-11_50eedc2'
Create SMBIOS type 16
Create SMBIOS type 17
GENERIC: 0.0 (WIFI Device)
SMBIOS tables: 978 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 5636
Writing coreboot table at 0x99a81000
CBFS: Found 'cmos_layout.bin' @0x59980 size 0x22c in mcache @0x99b4d224
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 0000000000001000-000000000009ffff: RAM
 2. 00000000000a0000-00000000000fffff: RESERVED
 3. 0000000000100000-0000000099a4bfff: RAM
 4. 0000000099a4c000-0000000099ad0fff: CONFIGURATION TABLES
 5. 0000000099ad1000-0000000099b20fff: RAMSTAGE
 6. 0000000099b21000-0000000099efffff: CONFIGURATION TABLES
 7. 0000000099f00000-000000009f7fffff: RESERVED
 8. 00000000e0000000-00000000efffffff: RESERVED
 9. 00000000fc000000-00000000fc000fff: RESERVED
10. 00000000fe000000-00000000fe00ffff: RESERVED
11. 00000000fed10000-00000000fed17fff: RESERVED
12. 00000000fed40000-00000000fed44fff: RESERVED
13. 00000000fed80000-00000000fed83fff: RESERVED
14. 00000000fed90000-00000000fed91fff: RESERVED
15. 00000000feda0000-00000000feda1fff: RESERVED
16. 0000000100000000-0000000a5e7fffff: RAM
SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
Wrote coreboot table at: 0x99a81000, 0x6e8 bytes, checksum b732
coreboot table: 1792 bytes.
IMD ROOT    0. 0x99eff000 0x00001000
IMD SMALL   1. 0x99efe000 0x00001000
FSP MEMORY  2. 0x99b4e000 0x003b0000
RO MCACHE   3. 0x99b4d000 0x000003b8
CONSOLE     4. 0x99b2d000 0x00020000
TIME STAMP  5. 0x99b2c000 0x00000910
ROMSTG STCK 6. 0x99b2b000 0x00001000
AFTER CAR   7. 0x99b21000 0x0000a000
RAMSTAGE    8. 0x99ad0000 0x00051000
ACPI GNVS   9. 0x99acf000 0x00001000
REFCODE    10. 0x99a9b000 0x00034000
SMM BACKUP 11. 0x99a8b000 0x00010000
4f444749   12. 0x99a89000 0x00002000
COREBOOT   13. 0x99a81000 0x00008000
ACPI       14. 0x99a5d000 0x00024000
TPM2 TCGLOG15. 0x99a4d000 0x00010000
SMBIOS     16. 0x99a4c000 0x00000800
IMD small region:
  IMD ROOT    0. 0x99efec00 0x00000400
  FSP RUNTIME 1. 0x99efebe0 0x00000004
  FMAP        2. 0x99efeac0 0x0000010a
  POWER STATE 3. 0x99efea80 0x00000040
  ROMSTAGE    4. 0x99efea60 0x00000004
  MEM INFO    5. 0x99efe880 0x000001e0
BS: BS_WRITE_TABLES run times (exec / console): 2 / 0 ms
MTRR: Physical address space:
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
0x00000000000c0000 - 0x0000000099f00000 size 0x99e40000 type 6
0x0000000099f00000 - 0x00000000a0000000 size 0x06100000 type 0
0x00000000a0000000 - 0x00000000b0000000 size 0x10000000 type 1
0x00000000b0000000 - 0x0000000100000000 size 0x50000000 type 0
0x0000000100000000 - 0x0000000a5e800000 size 0x95e800000 type 6
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
CPU physical address size: 39 bits
MTRR: default type WB/UC MTRR counts: 6/10.
MTRR: WB selected as default type.
MTRR: 0 base 0x0000000099f00000 mask 0x0000007ffff00000 type 0
MTRR: 1 base 0x000000009a000000 mask 0x0000007ffe000000 type 0
MTRR: 2 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
MTRR: 3 base 0x00000000a0000000 mask 0x0000007ff0000000 type 1
MTRR: 4 base 0x00000000b0000000 mask 0x0000007ff0000000 type 0
MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
BS: BS_WRITE_TABLES exit times (exec / console): 1 / 0 ms
POST: 0x7a
CBFS: Found 'fallback/payload' @0x11c4c0 size 0xb9f7f in mcache @0x99b4d33c
Checking segment from ROM address 0xff56c6f8
Checking segment from ROM address 0xff56c714
Loading segment from ROM address 0xff56c6f8
  code (compression=1)
  New segment dstaddr 0x00800000 memsize 0x800000 srcaddr 0xff56c730 filesize 0xb9f47
Loading Segment: addr: 0x00800000 memsz: 0x0000000000800000 filesz: 0x00000000000b9f47
using LZMA
CPU physical address size: 39 bits
CPU physical address size: 39 bits
CPU physical address size: 39 bits
CPU physical address size: 39 bits
CPU physical address size: 39 bits
CPU physical address size: 39 bits
CPU physical address size: 39 bits
Loading segment from ROM address 0xff56c714
  Entry Point 0x00800860
BS: BS_PAYLOAD_LOAD run times (exec / console): 318 / 0 ms
POST: 0x95
POST: 0x95
POST: 0x88
POST: 0x89
Finalizing chipset.
Finalizing SMM.
APMC done.
POST: 0xfe
BS: BS_PAYLOAD_LOAD exit times (exec / console): 3 / 0 ms
POST: 0x7b
mp_park_aps done after 0 msecs.
Jumping to boot code at 0x00800860(0x99a81000)
POST: 0xf8

coreboot-2021-03-11_50eedc2 Thu Mar 11 22:19:48 UTC 2021 bootblock starting (log level: 7)...
CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
CPU: ID 806ec, Whiskeylake V0, ucode: 000000d5
CPU: AES supported, TXT NOT supported, VT supported
MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
PCH: device id 0284 (rev 00) is Cometlake-U Premium
IGD: device id 9b41 (rev 02) is CometLake ULT GT2
FMAP: Found "FLASH" version 1.1 at 0x450000.
FMAP: base = 0xff000000 size = 0x1000000 #areas = 5
FMAP: area COREBOOT found @ 450200 (12254720 bytes)
CBFS: mcache @0xfef21400 built for 17 files, used 0x3b8 of 0x2000 bytes
CBFS: Found 'fallback/romstage' @0x80 size 0xcb8c in mcache @0xfef21438
BS: bootblock times (exec / console): total (unknown) / 0 ms

coreboot-2021-03-11_50eedc2 Thu Mar 11 22:19:48 UTC 2021 romstage starting (log level: 7)...
pm1_sts: 0000 pm1_en: 0000 pm1_cnt: 00001c00
gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
gpe0_sts[3]: 00010800 gpe0_en[3]: 00000000
TCO_STS:   0000 0000
GEN_PMCON: e0a01a38 00000200
GBLRST_CAUSE: 00000000 00000000
prev_sleep_state 0
CBFS: Found 'fspm.bin' @0x59dc0 size 0x8e000 in mcache @0xfef2164c
POST: 0x34
FMAP: area RW_MRC_CACHE found @ 400000 (65536 bytes)
SPD INDEX = 0
CBFS: Found 'spd.bin' @0x55dc0 size 0x200 in mcache @0xfef2159c
SPD: module type is DDR4
SPD: module part number is K4AAG165WA-BCTD     
SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
SPD: device width 16 bits, bus width 64 bits
SPD: module size is 8192 MB (per channel)
memory slot: 0 configuration done.
POST: 0x36
POST: 0x92
POST: 0x98
CBMEM:
IMD: root @ 0x99eff000 254 entries.
IMD: root @ 0x99efec00 62 entries.
External stage cache:
IMD: root @ 0x9abff000 254 entries.
IMD: root @ 0x9abfec00 62 entries.
FMAP: area RW_MRC_CACHE found @ 400000 (65536 bytes)
MRC: Checking cached data update for 'RW_MRC_CACHE'.
SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
MRC: 'RW_MRC_CACHE' does not need update.
2 DIMMs found
SMM Memory Map
SMRAM       : 0x9a000000 0x1000000
 Subregion 0: 0x9a000000 0xa00000
 Subregion 1: 0x9aa00000 0x200000
 Subregion 2: 0x9ac00000 0x400000
top_of_ram = 0x9a000000
MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
MTRR Range: Start=ff000000 End=0 (Size 1000000)
CBFS: Found 'fallback/postcar' @0x117680 size 0x4dd0 in mcache @0xfef21704
Decompressing stage fallback/postcar @ 0x99b21fc0 (36336 bytes)
Loading module at 0x99b22000 with entry 0x99b22031. filesize: 0x4a90 memsize: 0x8db0
Processing 185 relocs. Offset value of 0x97b22000
BS: romstage times (exec / console): total (unknown) / 1 ms

coreboot-2021-03-11_50eedc2 Thu Mar 11 22:19:48 UTC 2021 postcar starting (log level: 7)...
CBFS: Found 'fallback/ramstage' @0x3c500 size 0x192c7 in mcache @0x99b4d0ec
Decompressing stage fallback/ramstage @ 0x99ad0fc0 (326832 bytes)
Loading module at 0x99ad1000 with entry 0x99ad1000. filesize: 0x36288 memsize: 0x4fc70
Processing 3626 relocs. Offset value of 0x98cd1000
BS: postcar times (exec / console): total (unknown) / 0 ms

coreboot-2021-03-11_50eedc2 Thu Mar 11 22:19:48 UTC 2021 ramstage starting (log level: 7)...
POST: 0x39
POST: 0x80
Normal boot
POST: 0x70
CBFS: Found 'cpu_microcode_blob.bin' @0xcc80 size 0x2f800 in mcache @0x99b4d09c
microcode: sig=0x806ec pf=0x4 revision=0xd5
Skip microcode update
CBFS: Found 'fsps.bin' @0xe8dc0 size 0x2e85f in mcache @0x99b4d2c4
Detected 4 core, 8 thread CPU.
Setting up SMI for CPU
IED base = 0x9ac00000
IED size = 0x00400000
Will perform SMM setup.
CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
Processing 16 relocs. Offset value of 0x00030000
Attempting to start 7 APs
Waiting for 10ms after sending INIT.
Waiting for 1st SIPI to complete...done.
Waiting for 2nd SIPI to complete...done.
AP: slot 1 apic_id 1.
AP: slot 2 apic_id 3.
AP: slot 3 apic_id 2.
AP: slot 6 apic_id 6.
AP: slot 7 apic_id 7.
AP: slot 4 apic_id 4.
AP: slot 5 apic_id 5.
Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
Processing 13 relocs. Offset value of 0x00038000
SMM Module: stub loaded at 0x00038000. Will call 0x99ae902e(0x00000000)
Installing permanent SMM handler to 0x9a000000
Loading module at 0x9a010000 with entry 0x9a010b58. filesize: 0x2b48 memsize: 0x6c20
Processing 165 relocs. Offset value of 0x9a010000
Loading module at 0x9a008000 with entry 0x9a008000. filesize: 0x1b8 memsize: 0x1b8
Processing 13 relocs. Offset value of 0x9a008000
SMM Module: placing jmp sequence at 0x9a007c00 rel16 0x03fd
SMM Module: placing jmp sequence at 0x9a007800 rel16 0x07fd
SMM Module: placing jmp sequence at 0x9a007400 rel16 0x0bfd
SMM Module: placing jmp sequence at 0x9a007000 rel16 0x0ffd
SMM Module: placing jmp sequence at 0x9a006c00 rel16 0x13fd
SMM Module: placing jmp sequence at 0x9a006800 rel16 0x17fd
SMM Module: placing jmp sequence at 0x9a006400 rel16 0x1bfd
SMM Module: stub loaded at 0x9a008000. Will call 0x9a010b58(0x00000000)
Clearing SMI status registers
GPE0 STD STS: LAN_WAKE PME 
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x9a000000, cpu = 0
In relocation handler: CPU 0
New SMBASE=0x9a000000 IEDBASE=0x9ac00000
Writing SMRR. base = 0x9a000006, mask=0xff000800
Relocation complete.
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x99fffc00, cpu = 1
In relocation handler: CPU 1
New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
Writing SMRR. base = 0x9a000006, mask=0xff000800
Relocation complete.
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x99ffe800, cpu = 6
In relocation handler: CPU 6
New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
Writing SMRR. base = 0x9a000006, mask=0xff000800
Relocation complete.
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x99ffe400, cpu = 7
In relocation handler: CPU 7
New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
Writing SMRR. base = 0x9a000006, mask=0xff000800
Relocation complete.
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x99ffec00, cpu = 5
In relocation handler: CPU 5
New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
Writing SMRR. base = 0x9a000006, mask=0xff000800
Relocation complete.
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x99fff000, cpu = 4
In relocation handler: CPU 4
New SMBASE=0x99fff000 IEDBASE=0x9ac00000
Writing SMRR. base = 0x9a000006, mask=0xff000800
Relocation complete.
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x99fff800, cpu = 2
In relocation handler: CPU 2
New SMBASE=0x99fff800 IEDBASE=0x9ac00000
Writing SMRR. base = 0x9a000006, mask=0xff000800
Relocation complete.
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x99fff400, cpu = 3
In relocation handler: CPU 3
New SMBASE=0x99fff400 IEDBASE=0x9ac00000
Writing SMRR. base = 0x9a000006, mask=0xff000800
Relocation complete.
Initializing CPU #0
CPU: vendor Intel device 806ec
CPU: family 06, model 8e, stepping 0c
Clearing out pending MCEs
Setting up local APIC...
 apic_id: 0x00 done.
Turbo is available but hidden
Turbo is available and visible
IA32_FEATURE_CONTROL already locked; VMX status: enabled
IA32_FEATURE_CONTROL already locked
Skip microcode update
CPU #0 initialized
Initializing CPU #1
Initializing CPU #2
Initializing CPU #3
CPU: vendor Intel device 806ec
CPU: family 06, model 8e, stepping 0c
Initializing CPU #7
Initializing CPU #6
CPU: vendor Intel device 806ec
CPU: family 06, model 8e, stepping 0c
CPU: vendor Intel device 806ec
CPU: family 06, model 8e, stepping 0c
CPU: vendor Intel device 806ec
CPU: family 06, model 8e, stepping 0c
Clearing out pending MCEs
CPU: vendor Intel device 806ec
CPU: family 06, model 8e, stepping 0c
Clearing out pending MCEs
Clearing out pending MCEs
Initializing CPU #5
Initializing CPU #4
CPU: vendor Intel device 806ec
CPU: family 06, model 8e, stepping 0c
CPU: vendor Intel device 806ec
CPU: family 06, model 8e, stepping 0c
Clearing out pending MCEs
Clearing out pending MCEs
Setting up local APIC...
Clearing out pending MCEs
Clearing out pending MCEs
Setting up local APIC...
 apic_id: 0x01 done.
 apic_id: 0x03 done.
Setting up local APIC...
Setting up local APIC...
IA32_FEATURE_CONTROL already locked; VMX status: enabled
 apic_id: 0x02 done.
Setting up local APIC...
IA32_FEATURE_CONTROL already locked
 apic_id: 0x05 done.
Setting up local APIC...
Skip microcode update
CPU #1 initialized
 apic_id: 0x07 done.
Setting up local APIC...
IA32_FEATURE_CONTROL already locked; VMX status: enabled
 apic_id: 0x04 done.
IA32_FEATURE_CONTROL already locked
 apic_id: 0x06 done.
Skip microcode update
CPU #2 initialized
IA32_FEATURE_CONTROL already locked; VMX status: enabled
IA32_FEATURE_CONTROL already locked
IA32_FEATURE_CONTROL already locked; VMX status: enabled
Skip microcode update
CPU #3 initialized
IA32_FEATURE_CONTROL already locked
IA32_FEATURE_CONTROL already locked; VMX status: enabled
IA32_FEATURE_CONTROL already locked
Skip microcode update
CPU #5 initialized
IA32_FEATURE_CONTROL already locked; VMX status: enabled
IA32_FEATURE_CONTROL already locked
Skip microcode update
CPU #7 initialized
IA32_FEATURE_CONTROL already locked; VMX status: enabled
Skip microcode update
CPU #4 initialized
IA32_FEATURE_CONTROL already locked
Skip microcode update
CPU #6 initialized
bsp_do_flight_plan done after 6 msecs.
CPU: frequency set to 4200 MHz
Enabling SMIs.
Locking SMM.
BS: BS_DEV_INIT_CHIPS entry times (exec / console): 56 / 1 ms
POST: 0x71
CBFS: Found 'vbt.bin' @0xe7e00 size 0x499 in mcache @0x99b4d28c
Found a VBT of 4608 bytes after decompression
gpio_pad_reset_config_override: Logical to Chipset mapping not found
POST: 0x93
FSPS returned 0
POST: 0x99
Display FSP Version Info HOB
Reference Code - CPU = 9.0.30.50
uCode Version = 0.0.0.d6
TXT ACM version = ff.ff.ff.ffff
Reference Code - ME = 9.0.30.50
MEBx version = 0.0.0.0
ME Firmware Version = Consumer SKU
Reference Code - CML PCH = 9.0.30.50
PCH-CRID Status = Disabled
PCH-CRID Original Value = ff.ff.ff.ffff
PCH-CRID New Value = ff.ff.ff.ffff
OPROM - RST - RAID = ff.ff.ff.ffff
ChipsetInit Base Version = ff.ff.ff.ffff
ChipsetInit Oem Version = ff.ff.ff.ffff
Reference Code - SA - System Agent = 9.0.30.50
Reference Code - MRC = 0.0.0.45
SA - PCIe Version = 9.0.30.50
SA-CRID Status = Disabled
SA-CRID Original Value = 0.0.0.c
SA-CRID New Value = 0.0.0.c
OPROM - VBIOS = ff.ff.ff.ffff
gpio_pad_reset_config_override: Logical to Chipset mapping not found
Found PCIe Root Port #6 at PCI: 00:1c.0.
Found PCIe Root Port #9 at PCI: 00:1d.0.
Found PCIe Root Port #13 at PCI: 00:1d.4.
Remapping PCIe Root Port #6 from PCI: 00:1c.5 to new function number 0.
pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
BS: BS_DEV_INIT_CHIPS run times (exec / console): 308 / 0 ms
RTC Init
No CMOS option 'power_on_after_fail'.
Set power on after power failure.
Disabling Deep S3
Disabling Deep S3
Disabling Deep S4
Disabling Deep S4
Disabling Deep S5
Disabling Deep S5
BS: BS_DEV_INIT_CHIPS exit times (exec / console): 3 / 0 ms
POST: 0x72
Enumerating buses...
Root Device scanning...
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
POST: 0x24
PCI: 00:00.0 [8086/9b61] enabled
PCI: 00:02.0 [8086/9b41] enabled
PCI: 00:04.0 [8086/1903] enabled
PCI: 00:08.0 [8086/1911] enabled
PCI: 00:12.0 [8086/02f9] enabled
PCI: 00:14.0 [8086/02ed] enabled
PCI: 00:14.2 [8086/02ef] enabled
PCI: 00:14.3 [8086/02f0] enabled
PCI: 00:15.0 [8086/02e8] enabled
PCI: 00:16.0 [8086/02e0] disabled
PCI: Static device PCI: 00:17.0 not found, disabling it.
PCI: 00:19.0 [8086/02c5] disabled
PCI: 00:19.2 [8086/02c7] enabled
PCI: 00:1c.0 [8086/02bd] enabled
PCI: 00:1d.0 [8086/02b0] enabled
PCI: 00:1d.4 [8086/02b4] enabled
PCI: 00:1f.0 [8086/0284] enabled
PCI: 00:1f.3 [8086/02c8] enabled
PCI: 00:1f.4 [8086/02a3] enabled
PCI: 00:1f.5 [8086/02a4] enabled
POST: 0x25
PCI: Leftover static devices:
PCI: 00:12.5
PCI: 00:12.6
PCI: 00:13.0
PCI: 00:14.1
PCI: 00:14.5
PCI: 00:15.1
PCI: 00:15.2
PCI: 00:15.3
PCI: 00:16.1
PCI: 00:16.2
PCI: 00:16.3
PCI: 00:16.4
PCI: 00:16.5
PCI: 00:17.0
PCI: 00:19.1
PCI: 00:1a.0
PCI: 00:1e.0
PCI: 00:1e.1
PCI: 00:1e.2
PCI: 00:1e.3
PCI: 00:1f.1
PCI: 00:1f.2
PCI: 00:1f.6
PCI: Check your devicetree.cb.
PCI: 00:02.0 scanning...
scan_bus: bus PCI: 00:02.0 finished in 0 msecs
PCI: 00:14.0 scanning...
scan_bus: bus PCI: 00:14.0 finished in 0 msecs
PCI: 00:14.3 scanning...
GENERIC: 0.0 enabled
scan_bus: bus PCI: 00:14.3 finished in 0 msecs
PCI: 00:15.0 scanning...
I2C: 00:15 enabled
scan_bus: bus PCI: 00:15.0 finished in 0 msecs
PCI: 00:1c.0 scanning...
PCI: pci_scan_bus for bus 01
POST: 0x24
PCI: 01:00.0 [10ec/522a] enabled
POST: 0x25
POST: 0x55
Enabling Common Clock Configuration
L1 Sub-State supported from root port 28
L1 Sub-State Support = 0xf
CommonModeRestoreTime = 0x3c
Power On Value = 0x6, Power On Scale = 0x1
ASPM: Enabled L0s and L1
PCIe: Max_Payload_Size adjusted to 128
scan_bus: bus PCI: 00:1c.0 finished in 0 msecs
PCI: 00:1d.0 scanning...
PCI: pci_scan_bus for bus 02
POST: 0x24
PCI: 02:00.0 [144d/a808] enabled
POST: 0x25
POST: 0x55
Enabling Common Clock Configuration
L1 Sub-State supported from root port 29
L1 Sub-State Support = 0xf
CommonModeRestoreTime = 0x28
Power On Value = 0x16, Power On Scale = 0x0
ASPM: Enabled L1
PCIe: Max_Payload_Size adjusted to 128
scan_bus: bus PCI: 00:1d.0 finished in 0 msecs
PCI: 00:1d.4 scanning...
PCI: pci_scan_bus for bus 03
POST: 0x24
PCI: 03:00.0 [144d/a808] enabled
POST: 0x25
POST: 0x55
Enabling Common Clock Configuration
L1 Sub-State supported from root port 29
L1 Sub-State Support = 0xf
CommonModeRestoreTime = 0x28
Power On Value = 0x16, Power On Scale = 0x0
ASPM: Enabled L1
PCIe: Max_Payload_Size adjusted to 128
scan_bus: bus PCI: 00:1d.4 finished in 0 msecs
PCI: 00:1f.0 scanning...
PNP: 0c31.0 enabled
scan_bus: bus PCI: 00:1f.0 finished in 0 msecs
PCI: 00:1f.3 scanning...
scan_bus: bus PCI: 00:1f.3 finished in 0 msecs
PCI: 00:1f.4 scanning...
scan_bus: bus PCI: 00:1f.4 finished in 0 msecs
PCI: 00:1f.5 scanning...
scan_bus: bus PCI: 00:1f.5 finished in 0 msecs
POST: 0x55
scan_bus: bus DOMAIN: 0000 finished in 1 msecs
scan_bus: bus Root Device finished in 1 msecs
done
BS: BS_DEV_ENUMERATE run times (exec / console): 1 / 0 ms
MRC: Could not find region 'UNIFIED_MRC_CACHE'
FMAP: area RW_MRC_CACHE found @ 400000 (65536 bytes)
MRC: NOT enabling PRR for 'RW_MRC_CACHE'.
POST: 0x73
found VGA at PCI: 00:02.0
Setting up VGA for PCI: 00:02.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Done reading resources.
==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
 PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff
 PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff done
 PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
  PCI: 01:00.0 10 *  [0x0 - 0xfff] mem
 PCI: 00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
 PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
  PCI: 02:00.0 10 *  [0x0 - 0x3fff] mem
 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 PCI: 00:1d.4 io: size: 0 align: 12 gran: 12 limit: ffff
 PCI: 00:1d.4 io: size: 0 align: 12 gran: 12 limit: ffff done
 PCI: 00:1d.4 mem: size: 0 align: 20 gran: 20 limit: ffffffff
  PCI: 03:00.0 10 *  [0x0 - 0x3fff] mem
 PCI: 00:1d.4 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
 PCI: 00:1d.4 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 PCI: 00:1d.4 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
=== Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
 update_constraints: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
 update_constraints: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
 DOMAIN: 0000: Resource ranges:
 * Base: 1000, Size: 800, Tag: 100
 * Base: 1900, Size: d6a0, Tag: 100
 * Base: efc0, Size: 1040, Tag: 100
  PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
 update_constraints: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
 update_constraints: PCI: 00:00.0 01 base fed10000 limit fed17fff mem (fixed)
 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
 update_constraints: PCI: 00:00.0 04 base fc000000 limit fc000fff mem (fixed)
 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
 update_constraints: PCI: 00:00.0 06 base fe000000 limit fe00ffff mem (fixed)
 update_constraints: PCI: 00:00.0 07 base fed90000 limit fed90fff mem (fixed)
 update_constraints: PCI: 00:00.0 08 base fed91000 limit fed91fff mem (fixed)
 update_constraints: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
 update_constraints: PCI: 00:00.0 0a base 000c0000 limit 99efffff mem (fixed)
 update_constraints: PCI: 00:00.0 0b base 99f00000 limit 9f7fffff mem (fixed)
 update_constraints: PCI: 00:00.0 0c base 100000000 limit a5e7fffff mem (fixed)
 update_constraints: PCI: 00:00.0 0d base 000a0000 limit 000bffff mem (fixed)
 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 000fffff mem (fixed)
 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
 update_constraints: PNP: 0c31.0 00 base fed40000 limit fed44fff mem (fixed)
 DOMAIN: 0000: Resource ranges:
 * Base: 9f800000, Size: 40800000, Tag: 200
 * Base: f0000000, Size: c000000, Tag: 200
 * Base: fc001000, Size: 1fff000, Tag: 200
 * Base: fe010000, Size: 22000, Tag: 200
 * Base: fe033000, Size: cdd000, Tag: 200
 * Base: fed18000, Size: 28000, Tag: 200
 * Base: fed45000, Size: 3b000, Tag: 200
 * Base: fed84000, Size: c000, Tag: 200
 * Base: fed92000, Size: e000, Tag: 200
 * Base: feda2000, Size: 125e000, Tag: 200
 * Base: a5e800000, Size: 75a1800000, Tag: 100200
  PCI: 00:02.0 18 *  [0xa0000000 - 0xafffffff] limit: afffffff prefmem
  PCI: 00:02.0 10 *  [0xb0000000 - 0xb0ffffff] limit: b0ffffff mem
  PCI: 00:1c.0 20 *  [0x9f800000 - 0x9f8fffff] limit: 9f8fffff mem
  PCI: 00:1d.0 20 *  [0x9f900000 - 0x9f9fffff] limit: 9f9fffff mem
  PCI: 00:1d.4 20 *  [0x9fa00000 - 0x9fafffff] limit: 9fafffff mem
  PCI: 00:1f.3 20 *  [0x9fb00000 - 0x9fbfffff] limit: 9fbfffff mem
  PCI: 00:14.0 10 *  [0x9fc00000 - 0x9fc0ffff] limit: 9fc0ffff mem
  PCI: 00:04.0 10 *  [0x9fc10000 - 0x9fc17fff] limit: 9fc17fff mem
  PCI: 00:14.3 10 *  [0x9fc18000 - 0x9fc1bfff] limit: 9fc1bfff mem
  PCI: 00:1f.3 10 *  [0x9fc1c000 - 0x9fc1ffff] limit: 9fc1ffff mem
  PCI: 00:14.2 10 *  [0x9fc20000 - 0x9fc21fff] limit: 9fc21fff mem
  PCI: 00:08.0 10 *  [0x9fc22000 - 0x9fc22fff] limit: 9fc22fff mem
  PCI: 00:12.0 10 *  [0x9fc23000 - 0x9fc23fff] limit: 9fc23fff mem
  PCI: 00:14.2 18 *  [0x9fc24000 - 0x9fc24fff] limit: 9fc24fff mem
  PCI: 00:15.0 10 *  [0x9fc25000 - 0x9fc25fff] limit: 9fc25fff mem
  PCI: 00:19.2 18 *  [0x9fc26000 - 0x9fc26fff] limit: 9fc26fff mem
  PCI: 00:1f.5 10 *  [0x9fc27000 - 0x9fc27fff] limit: 9fc27fff mem
  PCI: 00:1f.4 10 *  [0x9fc28000 - 0x9fc280ff] limit: 9fc280ff mem
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
PCI: 00:1c.0 mem: base: 9f800000 size: 100000 align: 20 gran: 20 limit: 9f8fffff
 PCI: 00:1c.0: Resource ranges:
 * Base: 9f800000, Size: 100000, Tag: 200
  PCI: 01:00.0 10 *  [0x9f800000 - 0x9f800fff] limit: 9f800fff mem
PCI: 00:1c.0 mem: base: 9f800000 size: 100000 align: 20 gran: 20 limit: 9f8fffff done
PCI: 00:1d.0 mem: base: 9f900000 size: 100000 align: 20 gran: 20 limit: 9f9fffff
 PCI: 00:1d.0: Resource ranges:
 * Base: 9f900000, Size: 100000, Tag: 200
  PCI: 02:00.0 10 *  [0x9f900000 - 0x9f903fff] limit: 9f903fff mem
PCI: 00:1d.0 mem: base: 9f900000 size: 100000 align: 20 gran: 20 limit: 9f9fffff done
PCI: 00:1d.4 mem: base: 9fa00000 size: 100000 align: 20 gran: 20 limit: 9fafffff
 PCI: 00:1d.4: Resource ranges:
 * Base: 9fa00000, Size: 100000, Tag: 200
  PCI: 03:00.0 10 *  [0x9fa00000 - 0x9fa03fff] limit: 9fa03fff mem
PCI: 00:1d.4 mem: base: 9fa00000 size: 100000 align: 20 gran: 20 limit: 9fafffff done
=== Resource allocator: DOMAIN: 0000 - resource allocation complete ===
PCI: 00:02.0 10 <- [0x00b0000000 - 0x00b0ffffff] size 0x01000000 gran 0x18 mem64
PCI: 00:02.0 18 <- [0x00a0000000 - 0x00afffffff] size 0x10000000 gran 0x1c prefmem64
PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
PCI: 00:04.0 10 <- [0x009fc10000 - 0x009fc17fff] size 0x00008000 gran 0x0f mem64
PCI: 00:08.0 10 <- [0x009fc22000 - 0x009fc22fff] size 0x00001000 gran 0x0c mem64
PCI: 00:12.0 10 <- [0x009fc23000 - 0x009fc23fff] size 0x00001000 gran 0x0c mem64
PCI: 00:14.0 10 <- [0x009fc00000 - 0x009fc0ffff] size 0x00010000 gran 0x10 mem64
PCI: 00:14.2 10 <- [0x009fc20000 - 0x009fc21fff] size 0x00002000 gran 0x0d mem64
PCI: 00:14.2 18 <- [0x009fc24000 - 0x009fc24fff] size 0x00001000 gran 0x0c mem64
PCI: 00:14.3 10 <- [0x009fc18000 - 0x009fc1bfff] size 0x00004000 gran 0x0e mem64
PCI: 00:15.0 10 <- [0x009fc25000 - 0x009fc25fff] size 0x00001000 gran 0x0c mem64
PCI: 00:19.2 18 <- [0x009fc26000 - 0x009fc26fff] size 0x00001000 gran 0x0c mem64
PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:1c.0 20 <- [0x009f800000 - 0x009f8fffff] size 0x00100000 gran 0x14 bus 01 mem
PCI: 01:00.0 10 <- [0x009f800000 - 0x009f800fff] size 0x00001000 gran 0x0c mem
PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:1d.0 20 <- [0x009f900000 - 0x009f9fffff] size 0x00100000 gran 0x14 bus 02 mem
PCI: 02:00.0 10 <- [0x009f900000 - 0x009f903fff] size 0x00004000 gran 0x0e mem64
PCI: 00:1d.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io
PCI: 00:1d.4 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 03 prefmem
PCI: 00:1d.4 20 <- [0x009fa00000 - 0x009fafffff] size 0x00100000 gran 0x14 bus 03 mem
PCI: 03:00.0 10 <- [0x009fa00000 - 0x009fa03fff] size 0x00004000 gran 0x0e mem64
PCI: 00:1f.3 10 <- [0x009fc1c000 - 0x009fc1ffff] size 0x00004000 gran 0x0e mem64
PCI: 00:1f.3 20 <- [0x009fb00000 - 0x009fbfffff] size 0x00100000 gran 0x14 mem64
PCI: 00:1f.4 10 <- [0x009fc28000 - 0x009fc280ff] size 0x00000100 gran 0x08 mem64
PCI: 00:1f.5 10 <- [0x009fc27000 - 0x009fc27fff] size 0x00001000 gran 0x0c mem
Done setting resources.
Done allocating resources.
BS: BS_DEV_RESOURCES run times (exec / console): 1 / 0 ms
POST: 0x94
POST: 0x94
POST: 0x74
Enabling resources...
PCI: 00:00.0 subsystem <- 1558/1401
PCI: 00:00.0 cmd <- 06
PCI: 00:02.0 subsystem <- 1558/1401
PCI: 00:02.0 cmd <- 03
PCI: 00:04.0 subsystem <- 1558/1401
PCI: 00:04.0 cmd <- 02
PCI: 00:08.0 cmd <- 06
PCI: 00:12.0 subsystem <- 1558/1401
PCI: 00:12.0 cmd <- 02
PCI: 00:14.0 subsystem <- 1558/1401
PCI: 00:14.0 cmd <- 02
PCI: 00:14.2 cmd <- 02
PCI: 00:14.3 subsystem <- 1558/1401
PCI: 00:14.3 cmd <- 02
PCI: 00:15.0 subsystem <- 1558/1401
PCI: 00:15.0 cmd <- 02
PCI: 00:19.2 subsystem <- 1558/1401
PCI: 00:19.2 cmd <- 06
PCI: 00:1c.0 bridge ctrl <- 0013
PCI: 00:1c.0 subsystem <- 1558/1401
PCI: 00:1c.0 cmd <- 06
PCI: 00:1d.0 bridge ctrl <- 0013
PCI: 00:1d.0 subsystem <- 1558/1401
PCI: 00:1d.0 cmd <- 06
PCI: 00:1d.4 bridge ctrl <- 0013
PCI: 00:1d.4 subsystem <- 1558/1401
PCI: 00:1d.4 cmd <- 06
PCI: 00:1f.0 subsystem <- 1558/1401
PCI: 00:1f.0 cmd <- 07
PCI: 00:1f.3 subsystem <- 1558/1401
PCI: 00:1f.3 cmd <- 02
PCI: 00:1f.4 subsystem <- 1558/1401
PCI: 00:1f.4 cmd <- 03
PCI: 00:1f.5 subsystem <- 1558/1401
PCI: 00:1f.5 cmd <- 406
PCI: 01:00.0 subsystem <- 1558/1401
PCI: 01:00.0 cmd <- 02
PCI: 02:00.0 subsystem <- 1558/1401
PCI: 02:00.0 cmd <- 02
PCI: 03:00.0 subsystem <- 1558/1401
PCI: 03:00.0 cmd <- 02
done.
Found TPM SLB9670 TT 2.0 by Infineon
tlcl_send_startup: Startup return code is 0
TPM: setup succeeded
BS: BS_DEV_INIT entry times (exec / console): 12 / 0 ms
POST: 0x75
Initializing devices...
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
PCI: 00:00.0 init
CPU TDP = 15 Watts
CPU PL1 = 20 Watts
CPU PL2 = 30 Watts
PCI: 00:00.0 init finished in 1 msecs
POST: 0x75
PCI: 00:02.0 init
GMA: Found VBT in CBFS
GMA: Found valid VBT in CBFS
framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
                   x_res x y_res: 1920 x 1080, size: 8294400 at 0xa0000000
PCI: 00:02.0 init finished in 0 msecs
POST: 0x75
PCI: 00:04.0 init
PCI: 00:04.0 init finished in 0 msecs
POST: 0x75
PCI: 00:08.0 init
PCI: 00:08.0 init finished in 0 msecs
POST: 0x75
PCI: 00:12.0 init
PCI: 00:12.0 init finished in 0 msecs
POST: 0x75
PCI: 00:14.0 init
PCI: 00:14.0 init finished in 0 msecs
POST: 0x75
PCI: 00:14.2 init
PCI: 00:14.2 init finished in 0 msecs
POST: 0x75
POST: 0x75
PCI: 00:15.0 init
I2C bus 0 version 0x3132322a
DW I2C bus 0 at 0x9fc25000 (400 KHz)
PCI: 00:15.0 init finished in 0 msecs
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
PCI: 00:1c.0 init
Initializing PCH PCIe bridge.
PCI: 00:1c.0 init finished in 0 msecs
POST: 0x75
PCI: 00:1d.0 init
Initializing PCH PCIe bridge.
PCI: 00:1d.0 init finished in 0 msecs
POST: 0x75
PCI: 00:1d.4 init
Initializing PCH PCIe bridge.
PCI: 00:1d.4 init finished in 0 msecs
POST: 0x75
PCI: 00:1f.0 init
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: ID = 0x02
PCI: 00:1f.0 init finished in 0 msecs
POST: 0x75
PCI: 00:1f.3 init
HDA: codec_mask = 05
HDA: Initializing codec #2
HDA: codec viddid: 8086280b
HDA: verb loaded.
HDA: Initializing codec #0
HDA: codec viddid: 10ec0293
HDA: verb loaded.
PCI: 00:1f.3 init finished in 5 msecs
POST: 0x75
PCI: 00:1f.4 init
PCI: 00:1f.4 init finished in 0 msecs
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
PCI: 01:00.0 init
PCI: 01:00.0 init finished in 0 msecs
POST: 0x75
PCI: 02:00.0 init
PCI: 02:00.0 init finished in 0 msecs
POST: 0x75
PCI: 03:00.0 init
PCI: 03:00.0 init finished in 0 msecs
POST: 0x75
Devices initialized
BS: BS_DEV_INIT run times (exec / console): 7 / 0 ms
Disabling ACPI via APMC.
APMC done.
POST: 0x76
Finalize devices...
Devices finalized
POST: 0x77
ME: send disable message
HECI: No CSE device
POST: 0x79
POST: 0x9c
CBFS: Found 'fallback/dsdt.aml' @0x56000 size 0x37de in mcache @0x99b4d1c4
CBFS: 'fallback/slic' not found.
ACPI: Writing ACPI tables at 99a5d000.
ACPI:    * FACS
ACPI:    * DSDT
PCI space above 4GB MMIO is at 0xa5e800000, len = 0x75a1800000
ACPI:    * FADT
SCI is IRQ9
ACPI: added table 1/32, length now 40
ACPI:     * SSDT
Found 1 CPU(s) with 4/8 physical/logical core(s) each.
PSS: 1601MHz power 15000 control 0x2a00 status 0x2a00
PSS: 1600MHz power 15000 control 0x1000 status 0x1000
PSS: 1400MHz power 12823 control 0xe00 status 0xe00
PSS: 1200MHz power 10732 control 0xc00 status 0xc00
PSS: 1000MHz power 8737 control 0xa00 status 0xa00
PSS: 800MHz power 6832 control 0x800 status 0x800
PSS: 600MHz power 5000 control 0x600 status 0x600
PSS: 400MHz power 3255 control 0x400 status 0x400
PSS: 1601MHz power 15000 control 0x2a00 status 0x2a00
PSS: 1600MHz power 15000 control 0x1000 status 0x1000
PSS: 1400MHz power 12823 control 0xe00 status 0xe00
PSS: 1200MHz power 10732 control 0xc00 status 0xc00
PSS: 1000MHz power 8737 control 0xa00 status 0xa00
PSS: 800MHz power 6832 control 0x800 status 0x800
PSS: 600MHz power 5000 control 0x600 status 0x600
PSS: 400MHz power 3255 control 0x400 status 0x400
PSS: 1601MHz power 15000 control 0x2a00 status 0x2a00
PSS: 1600MHz power 15000 control 0x1000 status 0x1000
PSS: 1400MHz power 12823 control 0xe00 status 0xe00
PSS: 1200MHz power 10732 control 0xc00 status 0xc00
PSS: 1000MHz power 8737 control 0xa00 status 0xa00
PSS: 800MHz power 6832 control 0x800 status 0x800
PSS: 600MHz power 5000 control 0x600 status 0x600
PSS: 400MHz power 3255 control 0x400 status 0x400
PSS: 1601MHz power 15000 control 0x2a00 status 0x2a00
PSS: 1600MHz power 15000 control 0x1000 status 0x1000
PSS: 1400MHz power 12823 control 0xe00 status 0xe00
PSS: 1200MHz power 10732 control 0xc00 status 0xc00
PSS: 1000MHz power 8737 control 0xa00 status 0xa00
PSS: 800MHz power 6832 control 0x800 status 0x800
PSS: 600MHz power 5000 control 0x600 status 0x600
PSS: 400MHz power 3255 control 0x400 status 0x400
PSS: 1601MHz power 15000 control 0x2a00 status 0x2a00
PSS: 1600MHz power 15000 control 0x1000 status 0x1000
PSS: 1400MHz power 12823 control 0xe00 status 0xe00
PSS: 1200MHz power 10732 control 0xc00 status 0xc00
PSS: 1000MHz power 8737 control 0xa00 status 0xa00
PSS: 800MHz power 6832 control 0x800 status 0x800
PSS: 600MHz power 5000 control 0x600 status 0x600
PSS: 400MHz power 3255 control 0x400 status 0x400
PSS: 1601MHz power 15000 control 0x2a00 status 0x2a00
PSS: 1600MHz power 15000 control 0x1000 status 0x1000
PSS: 1400MHz power 12823 control 0xe00 status 0xe00
PSS: 1200MHz power 10732 control 0xc00 status 0xc00
PSS: 1000MHz power 8737 control 0xa00 status 0xa00
PSS: 800MHz power 6832 control 0x800 status 0x800
PSS: 600MHz power 5000 control 0x600 status 0x600
PSS: 400MHz power 3255 control 0x400 status 0x400
PSS: 1601MHz power 15000 control 0x2a00 status 0x2a00
PSS: 1600MHz power 15000 control 0x1000 status 0x1000
PSS: 1400MHz power 12823 control 0xe00 status 0xe00
PSS: 1200MHz power 10732 control 0xc00 status 0xc00
PSS: 1000MHz power 8737 control 0xa00 status 0xa00
PSS: 800MHz power 6832 control 0x800 status 0x800
PSS: 600MHz power 5000 control 0x600 status 0x600
PSS: 400MHz power 3255 control 0x400 status 0x400
PSS: 1601MHz power 15000 control 0x2a00 status 0x2a00
PSS: 1600MHz power 15000 control 0x1000 status 0x1000
PSS: 1400MHz power 12823 control 0xe00 status 0xe00
PSS: 1200MHz power 10732 control 0xc00 status 0xc00
PSS: 1000MHz power 8737 control 0xa00 status 0xa00
PSS: 800MHz power 6832 control 0x800 status 0x800
PSS: 600MHz power 5000 control 0x600 status 0x600
PSS: 400MHz power 3255 control 0x400 status 0x400
\_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
\_SB.PCI0.I2C0.H015: ELAN Touchpad at I2C: 00:15
\_SB.PCI0.LPCB.TPM.TPM: LPC TPM PNP: 0c31.0
ACPI: added table 2/32, length now 44
ACPI:    * MCFG
ACPI: added table 3/32, length now 48
ACPI:    * TPM2
TPM2 log created at 0x99a4d000
ACPI: added table 4/32, length now 52
ACPI:     * LPIT
ACPI: added table 5/32, length now 56
ACPI:    * MADT
SCI is IRQ9
ACPI: added table 6/32, length now 60
current = 99a62600
ACPI:    * DMAR
ACPI: added table 7/32, length now 64
ACPI: added table 8/32, length now 68
ACPI:    * HPET
ACPI: added table 9/32, length now 72
ACPI: done.
ACPI tables: 22320 bytes.
smbios_write_tables: 99a4c000
SMBIOS firmware version is set to coreboot_version: '2021-03-11_50eedc2'
Create SMBIOS type 16
Create SMBIOS type 17
GENERIC: 0.0 (WIFI Device)
SMBIOS tables: 978 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 5636
Writing coreboot table at 0x99a81000
CBFS: Found 'cmos_layout.bin' @0x59980 size 0x22c in mcache @0x99b4d224
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 0000000000001000-000000000009ffff: RAM
 2. 00000000000a0000-00000000000fffff: RESERVED
 3. 0000000000100000-0000000099a4bfff: RAM
 4. 0000000099a4c000-0000000099ad0fff: CONFIGURATION TABLES
 5. 0000000099ad1000-0000000099b20fff: RAMSTAGE
 6. 0000000099b21000-0000000099efffff: CONFIGURATION TABLES
 7. 0000000099f00000-000000009f7fffff: RESERVED
 8. 00000000e0000000-00000000efffffff: RESERVED
 9. 00000000fc000000-00000000fc000fff: RESERVED
10. 00000000fe000000-00000000fe00ffff: RESERVED
11. 00000000fed10000-00000000fed17fff: RESERVED
12. 00000000fed40000-00000000fed44fff: RESERVED
13. 00000000fed80000-00000000fed83fff: RESERVED
14. 00000000fed90000-00000000fed91fff: RESERVED
15. 00000000feda0000-00000000feda1fff: RESERVED
16. 0000000100000000-0000000a5e7fffff: RAM
SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
Wrote coreboot table at: 0x99a81000, 0x6e8 bytes, checksum b732
coreboot table: 1792 bytes.
IMD ROOT    0. 0x99eff000 0x00001000
IMD SMALL   1. 0x99efe000 0x00001000
FSP MEMORY  2. 0x99b4e000 0x003b0000
RO MCACHE   3. 0x99b4d000 0x000003b8
CONSOLE     4. 0x99b2d000 0x00020000
TIME STAMP  5. 0x99b2c000 0x00000910
ROMSTG STCK 6. 0x99b2b000 0x00001000
AFTER CAR   7. 0x99b21000 0x0000a000
RAMSTAGE    8. 0x99ad0000 0x00051000
ACPI GNVS   9. 0x99acf000 0x00001000
REFCODE    10. 0x99a9b000 0x00034000
SMM BACKUP 11. 0x99a8b000 0x00010000
4f444749   12. 0x99a89000 0x00002000
COREBOOT   13. 0x99a81000 0x00008000
ACPI       14. 0x99a5d000 0x00024000
TPM2 TCGLOG15. 0x99a4d000 0x00010000
SMBIOS     16. 0x99a4c000 0x00000800
IMD small region:
  IMD ROOT    0. 0x99efec00 0x00000400
  FSP RUNTIME 1. 0x99efebe0 0x00000004
  FMAP        2. 0x99efeac0 0x0000010a
  POWER STATE 3. 0x99efea80 0x00000040
  ROMSTAGE    4. 0x99efea60 0x00000004
  MEM INFO    5. 0x99efe880 0x000001e0
BS: BS_WRITE_TABLES run times (exec / console): 2 / 0 ms
MTRR: Physical address space:
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
0x00000000000c0000 - 0x0000000099f00000 size 0x99e40000 type 6
0x0000000099f00000 - 0x00000000a0000000 size 0x06100000 type 0
0x00000000a0000000 - 0x00000000b0000000 size 0x10000000 type 1
0x00000000b0000000 - 0x0000000100000000 size 0x50000000 type 0
0x0000000100000000 - 0x0000000a5e800000 size 0x95e800000 type 6
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
CPU physical address size: 39 bits
MTRR: default type WB/UC MTRR counts: 6/10.
MTRR: WB selected as default type.
MTRR: 0 base 0x0000000099f00000 mask 0x0000007ffff00000 type 0
MTRR: 1 base 0x000000009a000000 mask 0x0000007ffe000000 type 0
MTRR: 2 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
MTRR: 3 base 0x00000000a0000000 mask 0x0000007ff0000000 type 1
MTRR: 4 base 0x00000000b0000000 mask 0x0000007ff0000000 type 0
MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
BS: BS_WRITE_TABLES exit times (exec / console): 1 / 0 ms
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
POST: 0x7a
CBFS: Found 'fallback/payload' @0x11c4c0 size 0xb9f7f in mcache @0x99b4d33c
Checking segment from ROM address 0xff56c6f8
Checking segment from ROM address 0xff56c714
Loading segment from ROM address 0xff56c6f8
  code (compression=1)
  New segment dstaddr 0x00800000 memsize 0x800000 srcaddr 0xff56c730 filesize 0xb9f47
Loading Segment: addr: 0x00800000 memsz: 0x0000000000800000 filesz: 0x00000000000b9f47
using LZMA
CPU physical address size: 39 bits
CPU physical address size: 39 bits
CPU physical address size: 39 bits
CPU physical address size: 39 bits
CPU physical address size: 39 bits
CPU physical address size: 39 bits
CPU physical address size: 39 bits
Loading segment from ROM address 0xff56c714
  Entry Point 0x00800860
BS: BS_PAYLOAD_LOAD run times (exec / console): 324 / 0 ms
POST: 0x95
POST: 0x95
POST: 0x88
POST: 0x89
Finalizing chipset.
Finalizing SMM.
APMC done.
POST: 0xfe
BS: BS_PAYLOAD_LOAD exit times (exec / console): 3 / 0 ms
POST: 0x7b
mp_park_aps done after 0 msecs.
Jumping to boot code at 0x00800860(0x99a81000)
POST: 0xf8

coreboot-2021-03-11_50eedc2 Thu Mar 11 22:19:48 UTC 2021 bootblock starting (log level: 7)...
CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
CPU: ID 806ec, Whiskeylake V0, ucode: 000000d5
CPU: AES supported, TXT NOT supported, VT supported
MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
PCH: device id 0284 (rev 00) is Cometlake-U Premium
IGD: device id 9b41 (rev 02) is CometLake ULT GT2
CBFS: Found 'fallback/romstage' @0x80 size 0xcb8c in mcache @0xfef21438
BS: bootblock times (exec / console): total (unknown) / 0 ms

coreboot-2021-03-11_50eedc2 Thu Mar 11 22:19:48 UTC 2021 romstage starting (log level: 7)...
pm1_sts: 0000 pm1_en: 0000 pm1_cnt: 00001c00
gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
gpe0_sts[3]: 00010840 gpe0_en[3]: 00000000
TCO_STS:   0000 0000
GEN_PMCON: e0a01a38 00000200
GBLRST_CAUSE: 00000000 00000000
prev_sleep_state 0
CBFS: Found 'fspm.bin' @0x59dc0 size 0x8e000 in mcache @0xfef2164c
POST: 0x34
FMAP: area RW_MRC_CACHE found @ 400000 (65536 bytes)
SPD INDEX = 0
CBFS: Found 'spd.bin' @0x55dc0 size 0x200 in mcache @0xfef2159c
SPD: module type is DDR4
SPD: module part number is K4AAG165WA-BCTD     
SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
SPD: device width 16 bits, bus width 64 bits
SPD: module size is 8192 MB (per channel)
memory slot: 0 configuration done.
POST: 0x36
POST: 0x92
POST: 0x98
CBMEM:
IMD: root @ 0x99eff000 254 entries.
IMD: root @ 0x99efec00 62 entries.
External stage cache:
IMD: root @ 0x9abff000 254 entries.
IMD: root @ 0x9abfec00 62 entries.
FMAP: area RW_MRC_CACHE found @ 400000 (65536 bytes)
MRC: Checking cached data update for 'RW_MRC_CACHE'.
SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
MRC: 'RW_MRC_CACHE' does not need update.
2 DIMMs found
SMM Memory Map
SMRAM       : 0x9a000000 0x1000000
 Subregion 0: 0x9a000000 0xa00000
 Subregion 1: 0x9aa00000 0x200000
 Subregion 2: 0x9ac00000 0x400000
top_of_ram = 0x9a000000
MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
MTRR Range: Start=ff000000 End=0 (Size 1000000)
CBFS: Found 'fallback/postcar' @0x117680 size 0x4dd0 in mcache @0xfef21704
Decompressing stage fallback/postcar @ 0x99b21fc0 (36336 bytes)
Loading module at 0x99b22000 with entry 0x99b22031. filesize: 0x4a90 memsize: 0x8db0
Processing 185 relocs. Offset value of 0x97b22000
BS: romstage times (exec / console): total (unknown) / 1 ms

coreboot-2021-03-11_50eedc2 Thu Mar 11 22:19:48 UTC 2021 postcar starting (log level: 7)...
CBFS: Found 'fallback/ramstage' @0x3c500 size 0x192c7 in mcache @0x99b4d0ec
Decompressing stage fallback/ramstage @ 0x99ad0fc0 (326832 bytes)
Loading module at 0x99ad1000 with entry 0x99ad1000. filesize: 0x36288 memsize: 0x4fc70
Processing 3626 relocs. Offset value of 0x98cd1000
BS: postcar times (exec / console): total (unknown) / 0 ms

coreboot-2021-03-11_50eedc2 Thu Mar 11 22:19:48 UTC 2021 ramstage starting (log level: 7)...
POST: 0x39
POST: 0x80
Normal boot
POST: 0x70
CBFS: Found 'cpu_microcode_blob.bin' @0xcc80 size 0x2f800 in mcache @0x99b4d09c
microcode: sig=0x806ec pf=0x4 revision=0xd5
Skip microcode update
CBFS: Found 'fsps.bin' @0xe8dc0 size 0x2e85f in mcache @0x99b4d2c4
Detected 4 core, 8 thread CPU.
Setting up SMI for CPU
IED base = 0x9ac00000
IED size = 0x00400000
Will perform SMM setup.
CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
Processing 16 relocs. Offset value of 0x00030000
Attempting to start 7 APs
Waiting for 10ms after sending INIT.
Waiting for 1st SIPI to complete...done.
Waiting for 2nd SIPI to complete...done.
AP: slot 1 apic_id 1.
AP: slot 2 apic_id 4.
AP: slot 3 apic_id 5.
AP: slot 4 apic_id 7.
AP: slot 5 apic_id 6.
AP: slot 6 apic_id 3.
AP: slot 7 apic_id 2.
Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
Processing 13 relocs. Offset value of 0x00038000
SMM Module: stub loaded at 0x00038000. Will call 0x99ae902e(0x00000000)
Installing permanent SMM handler to 0x9a000000
Loading module at 0x9a010000 with entry 0x9a010b58. filesize: 0x2b48 memsize: 0x6c20
Processing 165 relocs. Offset value of 0x9a010000
Loading module at 0x9a008000 with entry 0x9a008000. filesize: 0x1b8 memsize: 0x1b8
Processing 13 relocs. Offset value of 0x9a008000
SMM Module: placing jmp sequence at 0x9a007c00 rel16 0x03fd
SMM Module: placing jmp sequence at 0x9a007800 rel16 0x07fd
SMM Module: placing jmp sequence at 0x9a007400 rel16 0x0bfd
SMM Module: placing jmp sequence at 0x9a007000 rel16 0x0ffd
SMM Module: placing jmp sequence at 0x9a006c00 rel16 0x13fd
SMM Module: placing jmp sequence at 0x9a006800 rel16 0x17fd
SMM Module: placing jmp sequence at 0x9a006400 rel16 0x1bfd
SMM Module: stub loaded at 0x9a008000. Will call 0x9a010b58(0x00000000)
Clearing SMI status registers
GPE0 STD STS: LAN_WAKE PME TCO_SCI 
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x9a000000, cpu = 0
In relocation handler: CPU 0
New SMBASE=0x9a000000 IEDBASE=0x9ac00000
Writing SMRR. base = 0x9a000006, mask=0xff000800
Relocation complete.
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x99fffc00, cpu = 1
In relocation handler: CPU 1
New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
Writing SMRR. base = 0x9a000006, mask=0xff000800
Relocation complete.
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x99ffe800, cpu = 6
In relocation handler: CPU 6
New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
Writing SMRR. base = 0x9a000006, mask=0xff000800
Relocation complete.
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x99ffe400, cpu = 7
In relocation handler: CPU 7
New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
Writing SMRR. base = 0x9a000006, mask=0xff000800
Relocation complete.
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x99ffec00, cpu = 5
In relocation handler: CPU 5
New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
Writing SMRR. base = 0x9a000006, mask=0xff000800
Relocation complete.
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x99fff000, cpu = 4
In relocation handler: CPU 4
New SMBASE=0x99fff000 IEDBASE=0x9ac00000
Writing SMRR. base = 0x9a000006, mask=0xff000800
Relocation complete.
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x99fff400, cpu = 3
In relocation handler: CPU 3
New SMBASE=0x99fff400 IEDBASE=0x9ac00000
Writing SMRR. base = 0x9a000006, mask=0xff000800
Relocation complete.
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x99fff800, cpu = 2
In relocation handler: CPU 2
New SMBASE=0x99fff800 IEDBASE=0x9ac00000
Writing SMRR. base = 0x9a000006, mask=0xff000800
Relocation complete.
Initializing CPU #0
CPU: vendor Intel device 806ec
CPU: family 06, model 8e, stepping 0c
Clearing out pending MCEs
Setting up local APIC...
 apic_id: 0x00 done.
Turbo is available but hidden
Turbo is available and visible
IA32_FEATURE_CONTROL already locked; VMX status: enabled
IA32_FEATURE_CONTROL already locked
Skip microcode update
CPU #0 initialized
Initializing CPU #1
Initializing CPU #6
Initializing CPU #7
CPU: vendor Intel device 806ec
CPU: family 06, model 8e, stepping 0c
CPU: vendor Intel device 806ec
CPU: family 06, model 8e, stepping 0c
Clearing out pending MCEs
Initializing CPU #5
Initializing CPU #4
CPU: vendor Intel device 806ec
CPU: family 06, model 8e, stepping 0c
CPU: vendor Intel device 806ec
CPU: family 06, model 8e, stepping 0c
Clearing out pending MCEs
Clearing out pending MCEs
Initializing CPU #3
Initializing CPU #2
CPU: vendor Intel device 806ec
CPU: family 06, model 8e, stepping 0c
CPU: vendor Intel device 806ec
CPU: family 06, model 8e, stepping 0c
Clearing out pending MCEs
Clearing out pending MCEs
CPU: vendor Intel device 806ec
CPU: family 06, model 8e, stepping 0c
Clearing out pending MCEs
Clearing out pending MCEs
Setting up local APIC...
Setting up local APIC...
 apic_id: 0x03 done.
 apic_id: 0x06 done.
Setting up local APIC...
Setting up local APIC...
 apic_id: 0x05 done.
Setting up local APIC...
 apic_id: 0x07 done.
Setting up local APIC...
Setting up local APIC...
 apic_id: 0x01 done.
IA32_FEATURE_CONTROL already locked; VMX status: enabled
 apic_id: 0x04 done.
 apic_id: 0x02 done.
IA32_FEATURE_CONTROL already locked
IA32_FEATURE_CONTROL already locked; VMX status: enabled
IA32_FEATURE_CONTROL already locked; VMX status: enabled
IA32_FEATURE_CONTROL already locked; VMX status: enabled
IA32_FEATURE_CONTROL already locked
IA32_FEATURE_CONTROL already locked
Skip microcode update
Skip microcode update
CPU #4 initialized
CPU #5 initialized
IA32_FEATURE_CONTROL already locked; VMX status: enabled
Skip microcode update
CPU #6 initialized
IA32_FEATURE_CONTROL already locked
IA32_FEATURE_CONTROL already locked
IA32_FEATURE_CONTROL already locked; VMX status: enabled
Skip microcode update
IA32_FEATURE_CONTROL already locked
CPU #3 initialized
Skip microcode update
CPU #2 initialized
IA32_FEATURE_CONTROL already locked; VMX status: enabled
Skip microcode update
CPU #7 initialized
IA32_FEATURE_CONTROL already locked
Skip microcode update
CPU #1 initialized
bsp_do_flight_plan done after 6 msecs.
CPU: frequency set to 4200 MHz
Enabling SMIs.
Locking SMM.
BS: BS_DEV_INIT_CHIPS entry times (exec / console): 56 / 1 ms
POST: 0x71
CBFS: Found 'vbt.bin' @0xe7e00 size 0x499 in mcache @0x99b4d28c
Found a VBT of 4608 bytes after decompression
gpio_pad_reset_config_override: Logical to Chipset mapping not found
POST: 0x93
FSPS returned 0
POST: 0x99
Display FSP Version Info HOB
Reference Code - CPU = 9.0.30.50
uCode Version = 0.0.0.d6
TXT ACM version = ff.ff.ff.ffff
Reference Code - ME = 9.0.30.50
MEBx version = 0.0.0.0
ME Firmware Version = Consumer SKU
Reference Code - CML PCH = 9.0.30.50
PCH-CRID Status = Disabled
PCH-CRID Original Value = ff.ff.ff.ffff
PCH-CRID New Value = ff.ff.ff.ffff
OPROM - RST - RAID = ff.ff.ff.ffff
ChipsetInit Base Version = ff.ff.ff.ffff
ChipsetInit Oem Version = ff.ff.ff.ffff
Reference Code - SA - System Agent = 9.0.30.50
Reference Code - MRC = 0.0.0.45
SA - PCIe Version = 9.0.30.50
SA-CRID Status = Disabled
SA-CRID Original Value = 0.0.0.c
SA-CRID New Value = 0.0.0.c
OPROM - VBIOS = ff.ff.ff.ffff
gpio_pad_reset_config_override: Logical to Chipset mapping not found
Found PCIe Root Port #6 at PCI: 00:1c.0.
Found PCIe Root Port #9 at PCI: 00:1d.0.
Found PCIe Root Port #13 at PCI: 00:1d.4.
Remapping PCIe Root Port #6 from PCI: 00:1c.5 to new function number 0.
pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
BS: BS_DEV_INIT_CHIPS run times (exec / console): 309 / 0 ms
RTC Init
No CMOS option 'power_on_after_fail'.
Set power on after power failure.
Disabling Deep S3
Disabling Deep S3
Disabling Deep S4
Disabling Deep S4
Disabling Deep S5
Disabling Deep S5
BS: BS_DEV_INIT_CHIPS exit times (exec / console): 3 / 0 ms
POST: 0x72
Enumerating buses...
Root Device scanning...
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
POST: 0x24
PCI: 00:00.0 [8086/9b61] enabled
PCI: 00:02.0 [8086/9b41] enabled
PCI: 00:04.0 [8086/1903] enabled
PCI: 00:08.0 [8086/1911] enabled
PCI: 00:12.0 [8086/02f9] enabled
PCI: 00:14.0 [8086/02ed] enabled
PCI: 00:14.2 [8086/02ef] enabled
PCI: 00:14.3 [8086/02f0] enabled
PCI: 00:15.0 [8086/02e8] enabled
PCI: 00:16.0 [8086/02e0] disabled
PCI: Static device PCI: 00:17.0 not found, disabling it.
PCI: 00:19.0 [8086/02c5] disabled
PCI: 00:19.2 [8086/02c7] enabled
PCI: 00:1c.0 [8086/02bd] enabled
PCI: 00:1d.0 [8086/02b0] enabled
PCI: 00:1d.4 [8086/02b4] enabled
PCI: 00:1f.0 [8086/0284] enabled
PCI: 00:1f.3 [8086/02c8] enabled
PCI: 00:1f.4 [8086/02a3] enabled
PCI: 00:1f.5 [8086/02a4] enabled
POST: 0x25
PCI: Leftover static devices:
PCI: 00:12.5
PCI: 00:12.6
PCI: 00:13.0
PCI: 00:14.1
PCI: 00:14.5
PCI: 00:15.1
PCI: 00:15.2
PCI: 00:15.3
PCI: 00:16.1
PCI: 00:16.2
PCI: 00:16.3
PCI: 00:16.4
PCI: 00:16.5
PCI: 00:17.0
PCI: 00:19.1
PCI: 00:1a.0
PCI: 00:1e.0
PCI: 00:1e.1
PCI: 00:1e.2
PCI: 00:1e.3
PCI: 00:1f.1
PCI: 00:1f.2
PCI: 00:1f.6
PCI: Check your devicetree.cb.
PCI: 00:02.0 scanning...
scan_bus: bus PCI: 00:02.0 finished in 0 msecs
PCI: 00:14.0 scanning...
scan_bus: bus PCI: 00:14.0 finished in 0 msecs
PCI: 00:14.3 scanning...
GENERIC: 0.0 enabled
scan_bus: bus PCI: 00:14.3 finished in 0 msecs
PCI: 00:15.0 scanning...
I2C: 00:15 enabled
scan_bus: bus PCI: 00:15.0 finished in 0 msecs
PCI: 00:1c.0 scanning...
PCI: pci_scan_bus for bus 01
POST: 0x24
PCI: 01:00.0 [10ec/522a] enabled
POST: 0x25
POST: 0x55
Enabling Common Clock Configuration
L1 Sub-State supported from root port 28
L1 Sub-State Support = 0xf
CommonModeRestoreTime = 0x3c
Power On Value = 0x6, Power On Scale = 0x1
ASPM: Enabled L0s and L1
PCIe: Max_Payload_Size adjusted to 128
scan_bus: bus PCI: 00:1c.0 finished in 0 msecs
PCI: 00:1d.0 scanning...
PCI: pci_scan_bus for bus 02
POST: 0x24
PCI: 02:00.0 [144d/a808] enabled
POST: 0x25
POST: 0x55
Enabling Common Clock Configuration
L1 Sub-State supported from root port 29
L1 Sub-State Support = 0xf
CommonModeRestoreTime = 0x28
Power On Value = 0x16, Power On Scale = 0x0
ASPM: Enabled L1
PCIe: Max_Payload_Size adjusted to 128
scan_bus: bus PCI: 00:1d.0 finished in 0 msecs
PCI: 00:1d.4 scanning...
PCI: pci_scan_bus for bus 03
POST: 0x24
PCI: 03:00.0 [144d/a808] enabled
POST: 0x25
POST: 0x55
Enabling Common Clock Configuration
L1 Sub-State supported from root port 29
L1 Sub-State Support = 0xf
CommonModeRestoreTime = 0x28
Power On Value = 0x16, Power On Scale = 0x0
ASPM: Enabled L1
PCIe: Max_Payload_Size adjusted to 128
scan_bus: bus PCI: 00:1d.4 finished in 0 msecs
PCI: 00:1f.0 scanning...
PNP: 0c31.0 enabled
scan_bus: bus PCI: 00:1f.0 finished in 0 msecs
PCI: 00:1f.3 scanning...
scan_bus: bus PCI: 00:1f.3 finished in 0 msecs
PCI: 00:1f.4 scanning...
scan_bus: bus PCI: 00:1f.4 finished in 0 msecs
PCI: 00:1f.5 scanning...
scan_bus: bus PCI: 00:1f.5 finished in 0 msecs
POST: 0x55
scan_bus: bus DOMAIN: 0000 finished in 1 msecs
scan_bus: bus Root Device finished in 1 msecs
done
BS: BS_DEV_ENUMERATE run times (exec / console): 2 / 0 ms
MRC: Could not find region 'UNIFIED_MRC_CACHE'
FMAP: area RW_MRC_CACHE found @ 400000 (65536 bytes)
MRC: NOT enabling PRR for 'RW_MRC_CACHE'.
POST: 0x73
found VGA at PCI: 00:02.0
Setting up VGA for PCI: 00:02.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Done reading resources.
==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
 PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff
 PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff done
 PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
  PCI: 01:00.0 10 *  [0x0 - 0xfff] mem
 PCI: 00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
 PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
  PCI: 02:00.0 10 *  [0x0 - 0x3fff] mem
 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 PCI: 00:1d.4 io: size: 0 align: 12 gran: 12 limit: ffff
 PCI: 00:1d.4 io: size: 0 align: 12 gran: 12 limit: ffff done
 PCI: 00:1d.4 mem: size: 0 align: 20 gran: 20 limit: ffffffff
  PCI: 03:00.0 10 *  [0x0 - 0x3fff] mem
 PCI: 00:1d.4 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
 PCI: 00:1d.4 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 PCI: 00:1d.4 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
=== Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
 update_constraints: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
 update_constraints: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
 DOMAIN: 0000: Resource ranges:
 * Base: 1000, Size: 800, Tag: 100
 * Base: 1900, Size: d6a0, Tag: 100
 * Base: efc0, Size: 1040, Tag: 100
  PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
 update_constraints: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
 update_constraints: PCI: 00:00.0 01 base fed10000 limit fed17fff mem (fixed)
 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
 update_constraints: PCI: 00:00.0 04 base fc000000 limit fc000fff mem (fixed)
 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
 update_constraints: PCI: 00:00.0 06 base fe000000 limit fe00ffff mem (fixed)
 update_constraints: PCI: 00:00.0 07 base fed90000 limit fed90fff mem (fixed)
 update_constraints: PCI: 00:00.0 08 base fed91000 limit fed91fff mem (fixed)
 update_constraints: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
 update_constraints: PCI: 00:00.0 0a base 000c0000 limit 99efffff mem (fixed)
 update_constraints: PCI: 00:00.0 0b base 99f00000 limit 9f7fffff mem (fixed)
 update_constraints: PCI: 00:00.0 0c base 100000000 limit a5e7fffff mem (fixed)
 update_constraints: PCI: 00:00.0 0d base 000a0000 limit 000bffff mem (fixed)
 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 000fffff mem (fixed)
 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
 update_constraints: PNP: 0c31.0 00 base fed40000 limit fed44fff mem (fixed)
 DOMAIN: 0000: Resource ranges:
 * Base: 9f800000, Size: 40800000, Tag: 200
 * Base: f0000000, Size: c000000, Tag: 200
 * Base: fc001000, Size: 1fff000, Tag: 200
 * Base: fe010000, Size: 22000, Tag: 200
 * Base: fe033000, Size: cdd000, Tag: 200
 * Base: fed18000, Size: 28000, Tag: 200
 * Base: fed45000, Size: 3b000, Tag: 200
 * Base: fed84000, Size: c000, Tag: 200
 * Base: fed92000, Size: e000, Tag: 200
 * Base: feda2000, Size: 125e000, Tag: 200
 * Base: a5e800000, Size: 75a1800000, Tag: 100200
  PCI: 00:02.0 18 *  [0xa0000000 - 0xafffffff] limit: afffffff prefmem
  PCI: 00:02.0 10 *  [0xb0000000 - 0xb0ffffff] limit: b0ffffff mem
  PCI: 00:1c.0 20 *  [0x9f800000 - 0x9f8fffff] limit: 9f8fffff mem
  PCI: 00:1d.0 20 *  [0x9f900000 - 0x9f9fffff] limit: 9f9fffff mem
  PCI: 00:1d.4 20 *  [0x9fa00000 - 0x9fafffff] limit: 9fafffff mem
  PCI: 00:1f.3 20 *  [0x9fb00000 - 0x9fbfffff] limit: 9fbfffff mem
  PCI: 00:14.0 10 *  [0x9fc00000 - 0x9fc0ffff] limit: 9fc0ffff mem
  PCI: 00:04.0 10 *  [0x9fc10000 - 0x9fc17fff] limit: 9fc17fff mem
  PCI: 00:14.3 10 *  [0x9fc18000 - 0x9fc1bfff] limit: 9fc1bfff mem
  PCI: 00:1f.3 10 *  [0x9fc1c000 - 0x9fc1ffff] limit: 9fc1ffff mem
  PCI: 00:14.2 10 *  [0x9fc20000 - 0x9fc21fff] limit: 9fc21fff mem
  PCI: 00:08.0 10 *  [0x9fc22000 - 0x9fc22fff] limit: 9fc22fff mem
  PCI: 00:12.0 10 *  [0x9fc23000 - 0x9fc23fff] limit: 9fc23fff mem
  PCI: 00:14.2 18 *  [0x9fc24000 - 0x9fc24fff] limit: 9fc24fff mem
  PCI: 00:15.0 10 *  [0x9fc25000 - 0x9fc25fff] limit: 9fc25fff mem
  PCI: 00:19.2 18 *  [0x9fc26000 - 0x9fc26fff] limit: 9fc26fff mem
  PCI: 00:1f.5 10 *  [0x9fc27000 - 0x9fc27fff] limit: 9fc27fff mem
  PCI: 00:1f.4 10 *  [0x9fc28000 - 0x9fc280ff] limit: 9fc280ff mem
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
PCI: 00:1c.0 mem: base: 9f800000 size: 100000 align: 20 gran: 20 limit: 9f8fffff
 PCI: 00:1c.0: Resource ranges:
 * Base: 9f800000, Size: 100000, Tag: 200
  PCI: 01:00.0 10 *  [0x9f800000 - 0x9f800fff] limit: 9f800fff mem
PCI: 00:1c.0 mem: base: 9f800000 size: 100000 align: 20 gran: 20 limit: 9f8fffff done
PCI: 00:1d.0 mem: base: 9f900000 size: 100000 align: 20 gran: 20 limit: 9f9fffff
 PCI: 00:1d.0: Resource ranges:
 * Base: 9f900000, Size: 100000, Tag: 200
  PCI: 02:00.0 10 *  [0x9f900000 - 0x9f903fff] limit: 9f903fff mem
PCI: 00:1d.0 mem: base: 9f900000 size: 100000 align: 20 gran: 20 limit: 9f9fffff done
PCI: 00:1d.4 mem: base: 9fa00000 size: 100000 align: 20 gran: 20 limit: 9fafffff
 PCI: 00:1d.4: Resource ranges:
 * Base: 9fa00000, Size: 100000, Tag: 200
  PCI: 03:00.0 10 *  [0x9fa00000 - 0x9fa03fff] limit: 9fa03fff mem
PCI: 00:1d.4 mem: base: 9fa00000 size: 100000 align: 20 gran: 20 limit: 9fafffff done
=== Resource allocator: DOMAIN: 0000 - resource allocation complete ===
PCI: 00:02.0 10 <- [0x00b0000000 - 0x00b0ffffff] size 0x01000000 gran 0x18 mem64
PCI: 00:02.0 18 <- [0x00a0000000 - 0x00afffffff] size 0x10000000 gran 0x1c prefmem64
PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
PCI: 00:04.0 10 <- [0x009fc10000 - 0x009fc17fff] size 0x00008000 gran 0x0f mem64
PCI: 00:08.0 10 <- [0x009fc22000 - 0x009fc22fff] size 0x00001000 gran 0x0c mem64
PCI: 00:12.0 10 <- [0x009fc23000 - 0x009fc23fff] size 0x00001000 gran 0x0c mem64
PCI: 00:14.0 10 <- [0x009fc00000 - 0x009fc0ffff] size 0x00010000 gran 0x10 mem64
PCI: 00:14.2 10 <- [0x009fc20000 - 0x009fc21fff] size 0x00002000 gran 0x0d mem64
PCI: 00:14.2 18 <- [0x009fc24000 - 0x009fc24fff] size 0x00001000 gran 0x0c mem64
PCI: 00:14.3 10 <- [0x009fc18000 - 0x009fc1bfff] size 0x00004000 gran 0x0e mem64
PCI: 00:15.0 10 <- [0x009fc25000 - 0x009fc25fff] size 0x00001000 gran 0x0c mem64
PCI: 00:19.2 18 <- [0x009fc26000 - 0x009fc26fff] size 0x00001000 gran 0x0c mem64
PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:1c.0 20 <- [0x009f800000 - 0x009f8fffff] size 0x00100000 gran 0x14 bus 01 mem
PCI: 01:00.0 10 <- [0x009f800000 - 0x009f800fff] size 0x00001000 gran 0x0c mem
PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:1d.0 20 <- [0x009f900000 - 0x009f9fffff] size 0x00100000 gran 0x14 bus 02 mem
PCI: 02:00.0 10 <- [0x009f900000 - 0x009f903fff] size 0x00004000 gran 0x0e mem64
PCI: 00:1d.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io
PCI: 00:1d.4 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 03 prefmem
PCI: 00:1d.4 20 <- [0x009fa00000 - 0x009fafffff] size 0x00100000 gran 0x14 bus 03 mem
PCI: 03:00.0 10 <- [0x009fa00000 - 0x009fa03fff] size 0x00004000 gran 0x0e mem64
PCI: 00:1f.3 10 <- [0x009fc1c000 - 0x009fc1ffff] size 0x00004000 gran 0x0e mem64
PCI: 00:1f.3 20 <- [0x009fb00000 - 0x009fbfffff] size 0x00100000 gran 0x14 mem64
PCI: 00:1f.4 10 <- [0x009fc28000 - 0x009fc280ff] size 0x00000100 gran 0x08 mem64
PCI: 00:1f.5 10 <- [0x009fc27000 - 0x009fc27fff] size 0x00001000 gran 0x0c mem
Done setting resources.
Done allocating resources.
BS: BS_DEV_RESOURCES run times (exec / console): 1 / 0 ms
POST: 0x94
POST: 0x94
POST: 0x74
Enabling resources...
PCI: 00:00.0 subsystem <- 1558/1401
PCI: 00:00.0 cmd <- 06
PCI: 00:02.0 subsystem <- 1558/1401
PCI: 00:02.0 cmd <- 03
PCI: 00:04.0 subsystem <- 1558/1401
PCI: 00:04.0 cmd <- 02
PCI: 00:08.0 cmd <- 06
PCI: 00:12.0 subsystem <- 1558/1401
PCI: 00:12.0 cmd <- 02
PCI: 00:14.0 subsystem <- 1558/1401
PCI: 00:14.0 cmd <- 02
PCI: 00:14.2 cmd <- 02
PCI: 00:14.3 subsystem <- 1558/1401
PCI: 00:14.3 cmd <- 02
PCI: 00:15.0 subsystem <- 1558/1401
PCI: 00:15.0 cmd <- 02
PCI: 00:19.2 subsystem <- 1558/1401
PCI: 00:19.2 cmd <- 06
PCI: 00:1c.0 bridge ctrl <- 0013
PCI: 00:1c.0 subsystem <- 1558/1401
PCI: 00:1c.0 cmd <- 06
PCI: 00:1d.0 bridge ctrl <- 0013
PCI: 00:1d.0 subsystem <- 1558/1401
PCI: 00:1d.0 cmd <- 06
PCI: 00:1d.4 bridge ctrl <- 0013
PCI: 00:1d.4 subsystem <- 1558/1401
PCI: 00:1d.4 cmd <- 06
PCI: 00:1f.0 subsystem <- 1558/1401
PCI: 00:1f.0 cmd <- 07
PCI: 00:1f.3 subsystem <- 1558/1401
PCI: 00:1f.3 cmd <- 02
PCI: 00:1f.4 subsystem <- 1558/1401
PCI: 00:1f.4 cmd <- 03
PCI: 00:1f.5 subsystem <- 1558/1401
PCI: 00:1f.5 cmd <- 406
PCI: 01:00.0 subsystem <- 1558/1401
PCI: 01:00.0 cmd <- 02
PCI: 02:00.0 subsystem <- 1558/1401
PCI: 02:00.0 cmd <- 02
PCI: 03:00.0 subsystem <- 1558/1401
PCI: 03:00.0 cmd <- 02
done.
Found TPM SLB9670 TT 2.0 by Infineon
tlcl_send_startup: Startup return code is 0
TPM: setup succeeded
BS: BS_DEV_INIT entry times (exec / console): 12 / 0 ms
POST: 0x75
Initializing devices...
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
PCI: 00:00.0 init
CPU TDP = 15 Watts
CPU PL1 = 20 Watts
CPU PL2 = 30 Watts
PCI: 00:00.0 init finished in 1 msecs
POST: 0x75
PCI: 00:02.0 init
GMA: Found VBT in CBFS
GMA: Found valid VBT in CBFS
framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
                   x_res x y_res: 1920 x 1080, size: 8294400 at 0xa0000000
PCI: 00:02.0 init finished in 0 msecs
POST: 0x75
PCI: 00:04.0 init
PCI: 00:04.0 init finished in 0 msecs
POST: 0x75
PCI: 00:08.0 init
PCI: 00:08.0 init finished in 0 msecs
POST: 0x75
PCI: 00:12.0 init
PCI: 00:12.0 init finished in 0 msecs
POST: 0x75
PCI: 00:14.0 init
PCI: 00:14.0 init finished in 0 msecs
POST: 0x75
PCI: 00:14.2 init
PCI: 00:14.2 init finished in 0 msecs
POST: 0x75
POST: 0x75
PCI: 00:15.0 init
I2C bus 0 version 0x3132322a
DW I2C bus 0 at 0x9fc25000 (400 KHz)
PCI: 00:15.0 init finished in 0 msecs
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
PCI: 00:1c.0 init
Initializing PCH PCIe bridge.
PCI: 00:1c.0 init finished in 0 msecs
POST: 0x75
PCI: 00:1d.0 init
Initializing PCH PCIe bridge.
PCI: 00:1d.0 init finished in 0 msecs
POST: 0x75
PCI: 00:1d.4 init
Initializing PCH PCIe bridge.
PCI: 00:1d.4 init finished in 0 msecs
POST: 0x75
PCI: 00:1f.0 init
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: ID = 0x02
PCI: 00:1f.0 init finished in 0 msecs
POST: 0x75
PCI: 00:1f.3 init
HDA: codec_mask = 05
HDA: Initializing codec #2
HDA: codec viddid: 8086280b
HDA: verb loaded.
HDA: Initializing codec #0
HDA: codec viddid: 10ec0293
HDA: verb loaded.
PCI: 00:1f.3 init finished in 5 msecs
POST: 0x75
PCI: 00:1f.4 init
PCI: 00:1f.4 init finished in 0 msecs
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
PCI: 01:00.0 init
PCI: 01:00.0 init finished in 0 msecs
POST: 0x75
PCI: 02:00.0 init
PCI: 02:00.0 init finished in 0 msecs
POST: 0x75
PCI: 03:00.0 init
PCI: 03:00.0 init finished in 0 msecs
POST: 0x75
Devices initialized
BS: BS_DEV_INIT run times (exec / console): 7 / 0 ms
Disabling ACPI via APMC.
APMC done.
POST: 0x76
Finalize devices...
Devices finalized
POST: 0x77
ME: send disable message
HECI: No CSE device
POST: 0x79
POST: 0x9c
CBFS: Found 'fallback/dsdt.aml' @0x56000 size 0x37de in mcache @0x99b4d1c4
CBFS: 'fallback/slic' not found.
ACPI: Writing ACPI tables at 99a5d000.
ACPI:    * FACS
ACPI:    * DSDT
PCI space above 4GB MMIO is at 0xa5e800000, len = 0x75a1800000
ACPI:    * FADT
SCI is IRQ9
ACPI: added table 1/32, length now 40
ACPI:     * SSDT
Found 1 CPU(s) with 4/8 physical/logical core(s) each.
PSS: 1601MHz power 15000 control 0x2a00 status 0x2a00
PSS: 1600MHz power 15000 control 0x1000 status 0x1000
PSS: 1400MHz power 12823 control 0xe00 status 0xe00
PSS: 1200MHz power 10732 control 0xc00 status 0xc00
PSS: 1000MHz power 8737 control 0xa00 status 0xa00
PSS: 800MHz power 6832 control 0x800 status 0x800
PSS: 600MHz power 5000 control 0x600 status 0x600
PSS: 400MHz power 3255 control 0x400 status 0x400
PSS: 1601MHz power 15000 control 0x2a00 status 0x2a00
PSS: 1600MHz power 15000 control 0x1000 status 0x1000
PSS: 1400MHz power 12823 control 0xe00 status 0xe00
PSS: 1200MHz power 10732 control 0xc00 status 0xc00
PSS: 1000MHz power 8737 control 0xa00 status 0xa00
PSS: 800MHz power 6832 control 0x800 status 0x800
PSS: 600MHz power 5000 control 0x600 status 0x600
PSS: 400MHz power 3255 control 0x400 status 0x400
PSS: 1601MHz power 15000 control 0x2a00 status 0x2a00
PSS: 1600MHz power 15000 control 0x1000 status 0x1000
PSS: 1400MHz power 12823 control 0xe00 status 0xe00
PSS: 1200MHz power 10732 control 0xc00 status 0xc00
PSS: 1000MHz power 8737 control 0xa00 status 0xa00
PSS: 800MHz power 6832 control 0x800 status 0x800
PSS: 600MHz power 5000 control 0x600 status 0x600
PSS: 400MHz power 3255 control 0x400 status 0x400
PSS: 1601MHz power 15000 control 0x2a00 status 0x2a00
PSS: 1600MHz power 15000 control 0x1000 status 0x1000
PSS: 1400MHz power 12823 control 0xe00 status 0xe00
PSS: 1200MHz power 10732 control 0xc00 status 0xc00
PSS: 1000MHz power 8737 control 0xa00 status 0xa00
PSS: 800MHz power 6832 control 0x800 status 0x800
PSS: 600MHz power 5000 control 0x600 status 0x600
PSS: 400MHz power 3255 control 0x400 status 0x400
PSS: 1601MHz power 15000 control 0x2a00 status 0x2a00
PSS: 1600MHz power 15000 control 0x1000 status 0x1000
PSS: 1400MHz power 12823 control 0xe00 status 0xe00
PSS: 1200MHz power 10732 control 0xc00 status 0xc00
PSS: 1000MHz power 8737 control 0xa00 status 0xa00
PSS: 800MHz power 6832 control 0x800 status 0x800
PSS: 600MHz power 5000 control 0x600 status 0x600
PSS: 400MHz power 3255 control 0x400 status 0x400
PSS: 1601MHz power 15000 control 0x2a00 status 0x2a00
PSS: 1600MHz power 15000 control 0x1000 status 0x1000
PSS: 1400MHz power 12823 control 0xe00 status 0xe00
PSS: 1200MHz power 10732 control 0xc00 status 0xc00
PSS: 1000MHz power 8737 control 0xa00 status 0xa00
PSS: 800MHz power 6832 control 0x800 status 0x800
PSS: 600MHz power 5000 control 0x600 status 0x600
PSS: 400MHz power 3255 control 0x400 status 0x400
PSS: 1601MHz power 15000 control 0x2a00 status 0x2a00
PSS: 1600MHz power 15000 control 0x1000 status 0x1000
PSS: 1400MHz power 12823 control 0xe00 status 0xe00
PSS: 1200MHz power 10732 control 0xc00 status 0xc00
PSS: 1000MHz power 8737 control 0xa00 status 0xa00
PSS: 800MHz power 6832 control 0x800 status 0x800
PSS: 600MHz power 5000 control 0x600 status 0x600
PSS: 400MHz power 3255 control 0x400 status 0x400
PSS: 1601MHz power 15000 control 0x2a00 status 0x2a00
PSS: 1600MHz power 15000 control 0x1000 status 0x1000
PSS: 1400MHz power 12823 control 0xe00 status 0xe00
PSS: 1200MHz power 10732 control 0xc00 status 0xc00
PSS: 1000MHz power 8737 control 0xa00 status 0xa00
PSS: 800MHz power 6832 control 0x800 status 0x800
PSS: 600MHz power 5000 control 0x600 status 0x600
PSS: 400MHz power 3255 control 0x400 status 0x400
\_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
\_SB.PCI0.I2C0.H015: ELAN Touchpad at I2C: 00:15
\_SB.PCI0.LPCB.TPM.TPM: LPC TPM PNP: 0c31.0
ACPI: added table 2/32, length now 44
ACPI:    * MCFG
ACPI: added table 3/32, length now 48
ACPI:    * TPM2
TPM2 log created at 0x99a4d000
ACPI: added table 4/32, length now 52
ACPI:     * LPIT
ACPI: added table 5/32, length now 56
ACPI:    * MADT
SCI is IRQ9
ACPI: added table 6/32, length now 60
current = 99a62600
ACPI:    * DMAR
ACPI: added table 7/32, length now 64
ACPI: added table 8/32, length now 68
ACPI:    * HPET
ACPI: added table 9/32, length now 72
ACPI: done.
ACPI tables: 22320 bytes.
smbios_write_tables: 99a4c000
SMBIOS firmware version is set to coreboot_version: '2021-03-11_50eedc2'
Create SMBIOS type 16
Create SMBIOS type 17
GENERIC: 0.0 (WIFI Device)
SMBIOS tables: 978 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 5636
Writing coreboot table at 0x99a81000
CBFS: Found 'cmos_layout.bin' @0x59980 size 0x22c in mcache @0x99b4d224
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 0000000000001000-000000000009ffff: RAM
 2. 00000000000a0000-00000000000fffff: RESERVED
 3. 0000000000100000-0000000099a4bfff: RAM
 4. 0000000099a4c000-0000000099ad0fff: CONFIGURATION TABLES
 5. 0000000099ad1000-0000000099b20fff: RAMSTAGE
 6. 0000000099b21000-0000000099efffff: CONFIGURATION TABLES
 7. 0000000099f00000-000000009f7fffff: RESERVED
 8. 00000000e0000000-00000000efffffff: RESERVED
 9. 00000000fc000000-00000000fc000fff: RESERVED
10. 00000000fe000000-00000000fe00ffff: RESERVED
11. 00000000fed10000-00000000fed17fff: RESERVED
12. 00000000fed40000-00000000fed44fff: RESERVED
13. 00000000fed80000-00000000fed83fff: RESERVED
14. 00000000fed90000-00000000fed91fff: RESERVED
15. 00000000feda0000-00000000feda1fff: RESERVED
16. 0000000100000000-0000000a5e7fffff: RAM
SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
Wrote coreboot table at: 0x99a81000, 0x6e8 bytes, checksum b732
coreboot table: 1792 bytes.
IMD ROOT    0. 0x99eff000 0x00001000
IMD SMALL   1. 0x99efe000 0x00001000
FSP MEMORY  2. 0x99b4e000 0x003b0000
RO MCACHE   3. 0x99b4d000 0x000003b8
CONSOLE     4. 0x99b2d000 0x00020000
TIME STAMP  5. 0x99b2c000 0x00000910
ROMSTG STCK 6. 0x99b2b000 0x00001000
AFTER CAR   7. 0x99b21000 0x0000a000
RAMSTAGE    8. 0x99ad0000 0x00051000
ACPI GNVS   9. 0x99acf000 0x00001000
REFCODE    10. 0x99a9b000 0x00034000
SMM BACKUP 11. 0x99a8b000 0x00010000
4f444749   12. 0x99a89000 0x00002000
COREBOOT   13. 0x99a81000 0x00008000
ACPI       14. 0x99a5d000 0x00024000
TPM2 TCGLOG15. 0x99a4d000 0x00010000
SMBIOS     16. 0x99a4c000 0x00000800
IMD small region:
  IMD ROOT    0. 0x99efec00 0x00000400
  FSP RUNTIME 1. 0x99efebe0 0x00000004
  FMAP        2. 0x99efeac0 0x0000010a
  POWER STATE 3. 0x99efea80 0x00000040
  ROMSTAGE    4. 0x99efea60 0x00000004
  MEM INFO    5. 0x99efe880 0x000001e0
BS: BS_WRITE_TABLES run times (exec / console): 2 / 0 ms
MTRR: Physical address space:
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
0x00000000000c0000 - 0x0000000099f00000 size 0x99e40000 type 6
0x0000000099f00000 - 0x00000000a0000000 size 0x06100000 type 0
0x00000000a0000000 - 0x00000000b0000000 size 0x10000000 type 1
0x00000000b0000000 - 0x0000000100000000 size 0x50000000 type 0
0x0000000100000000 - 0x0000000a5e800000 size 0x95e800000 type 6
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
CPU physical address size: 39 bits
MTRR: default type WB/UC MTRR counts: 6/10.
MTRR: WB selected as default type.
MTRR: 0 base 0x0000000099f00000 mask 0x0000007ffff00000 type 0
MTRR: 1 base 0x000000009a000000 mask 0x0000007ffe000000 type 0
MTRR: 2 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
MTRR: 3 base 0x00000000a0000000 mask 0x0000007ff0000000 type 1
MTRR: 4 base 0x00000000b0000000 mask 0x0000007ff0000000 type 0
MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

POST: 0x93
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
BS: BS_WRITE_TABLES exit times (exec / console): 1 / 0 ms
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
POST: 0x7a
CBFS: Found 'fallback/payload' @0x11c4c0 size 0xb9f7f in mcache @0x99b4d33c
Checking segment from ROM address 0xff56c6f8
Checking segment from ROM address 0xff56c714
Loading segment from ROM address 0xff56c6f8
  code (compression=1)
  New segment dstaddr 0x00800000 memsize 0x800000 srcaddr 0xff56c730 filesize 0xb9f47
Loading Segment: addr: 0x00800000 memsz: 0x0000000000800000 filesz: 0x00000000000b9f47
using LZMA
CPU physical address size: 39 bits
CPU physical address size: 39 bits
CPU physical address size: 39 bits
CPU physical address size: 39 bits
CPU physical address size: 39 bits
CPU physical address size: 39 bits
CPU physical address size: 39 bits
Loading segment from ROM address 0xff56c714
  Entry Point 0x00800860
BS: BS_PAYLOAD_LOAD run times (exec / console): 318 / 0 ms
POST: 0x95
POST: 0x95
POST: 0x88
POST: 0x89
SMMSTORE: CMOS reset, clearing store
FMAP: area SMMSTORE found @ 410000 (262144 bytes)
Finalizing chipset.
Finalizing SMM.
APMC done.
POST: 0xfe
BS: BS_PAYLOAD_LOAD exit times (exec / console): 158 / 0 ms
POST: 0x7b
mp_park_aps done after 0 msecs.
Jumping to boot code at 0x00800860(0x99a81000)
POST: 0xf8

mbk5631 commented 3 years ago

ok, I'm really not the slightest bit familiar with this code but I can only find (via grep) one place this message is generated, and in that same place is the only place I see the variable preserve_smmstore being set.

clear_store_on_reset appears to be the only place preserve_smmstore is set.

If preserve_smmstore does not return success and if the return message was not CMOS_CHECKSUM_INVALID then the preserve lval is set in the first block. That preserve value is never written. The only case in which preserve_smmstore is set is if the return value when fetched was CMOS_CHECKSUM_INVALID, at which point smmstore_clear_region is called and if that's successful, preserve_smmstore is set.

So on our machines is get_option(preserve_smmstore) returning something besides CB_SUCCESS and besides CB_CMOS_CHECKSUM_INVALID?

The only get_option I found in the tree is in payloads/libpayload/drivers/options.c. It only returns 0 and 1 and doesn't appear to use any of the enumerations. Is it the right one???

I could be totally wrong here...

Anyway back to my day job

crawfxrd commented 3 years ago

CMOS values can be viewed with nvramtool.

make -C coreboot/util/nvramtool
sudo ./coreboot/util/nvramtool -a

mbk5631 commented 3 years ago

ok thanks!

so right now it returns

pop-os:~/firmware-open$ sudo ./coreboot/util/nvramtool/nvramtool -a boot_option = Fallback reboot_counter = 0x0 preserve_smmstore = 0x1

So the value does exist.

There's a cmos_get_option in option.c. Is that the one that's supposed to be called? Ignore my earlier comments if that's true.

looks like there's an inline in option.h wrapping it with get_option. Missed that earlier.

The only cmos option the boot complains about not finding is poweron_after_fail, which isn't this one.

BTW you check for checksum after finding the variable and only then do you return CMOS_CHECKSUM_INVALID

So I have to assume it's finding the variable then failing the checksum test. The only way the reset gets executed. (there’s no printk for successful search)

If CMOS_CHECKSUM_INVALID is returned to clear_store_on_reser then smstore_clear_region is called. If that succeeds then preservE_smmstore is overwritten. If that call does not succeed then the previous value of preserve_smmstore is not changed and remains present.

The failure of smmstore_clear_region is not logged, so based on the code it was successful or CMOS_CHECKSUM_INVALID in fact was not returned.

cmos_checksum_valid does not log but the only two conditions I see for calling smmstore_clear_region are if the variable is not present or if CMOS_CHECKSUM_INVALID is returned.

It’s now present, and since it was not logged as a missing variable on reboot then the value returned should have been CMOS_CHECKSUM_INVALID.

Do you agree?

mbk5631 commented 3 years ago

If I ask nvramtool for the checksum (nvramtool -c) it gives me 0x1

$ sudo ./nvramtool -c 0x1

If I dump everything I get several checksums that are not 0x1... ?

$ sudo ./nvramtool -Y entries 0 384 r 0 reserved_memory 384 1 e 2 boot_option 388 4 h 0 reboot_counter 408 1 h 1 preserve_smmstore 984 16 h 0 check_sum

enumerations 1 0 Disable 1 1 Enable 2 0 Fallback 2 1 Normal 3 0 Emergency 3 1 Alert 3 2 Critical 3 3 Error 3 4 Warning 3 5 Notice 3 6 Info 3 7 Debug 3 8 Spew

checksums checksum 392 983 984

crawfxrd commented 3 years ago

-Y prints the CMOS layout. This is the cmos.layout file in the coreboot tree.

crawfxrd commented 3 years ago

Can force the issue by syncing time on Windows.

crawfxrd commented 3 years ago

Windows is writing the CMOS RTC century byte (0x32) and invalidating the checksum. coreboot loads the default of 0 for the option and SMMSTORE is cleared.

pspacek commented 3 years ago

FTR I'm seeing this issue even on machine which has only PopOS on it, and the UEFI menu contains "extra" boot options for iPXE and UEFI shell. I.e. no Windows involved, and the only OS which gets booted up is PopOS.

crawfxrd commented 3 years ago

Can you reliably reproduce it by booting only Pop?

You can try dumping the CMOS (nvramtool -x) before shutdown/reboot to see if something is writing to it.

pspacek commented 3 years ago

Can you reliably reproduce it by booting only Pop? Reliably - no, I did not find a way to reproduce it at will.

On the other hand, I'm almost 100% sure UEFI Boot Manager items sometimes disappear even if the only OS started on that machine is Pop. I've nuked Pop installation and replaced it with Arch yesterday, but I have already witnessed Boot Manager items disappearing as well, so I will monitor it and try the nvram -x trick to see what is going on.

nvramtool -x is currently crashing with:

nvramtool: util/nvramtool/accessors/cmos-mem.c:17: mem_hal_read: Assertion `mem_hal_data != (unsigned char*)-1' failed.

Do I need to do some setup? (I'm executing it under root and nvramtool -Y shows a sensible layout.)

jacobgkau commented 3 years ago

@pspacek This issue was identified and fixed in https://github.com/system76/coreboot/pull/72, which is why the issue is marked as closed. It won't be part of the next firmware update, but once an update dated later than August 20th is released, then the fix should be included. In the meantime, you could try building and flashing updated firmware locally on your system to confirm if that PR fixed the issue. First, install Rust nightly from rustup.rs, then run these commands:

git clone https://github.com/system76/firmware-open
cd firmware-open
./scripts/update.sh
./scripts/deps.sh
cd coreboot
git checkout master
cd ..
./scripts/build.sh <your-model-here>
./scripts/flash.sh <your-model-here>

The flashing script will power off the machine. After flashing, you can revert to normal firmware by using the normal firmware manager to "update."

If you're still seeing the issue with the latest version of coreboot, then it could actually be a different issue.

zancas commented 2 years ago

Hi @jacobgkau is building and flashing my own version of the open-firmware still the best solution, or is there a new official firmware I can install?

My system (a galp5, support ticket: 63754) is still on:

Version: 2021-07-20_93c2809 according to the boot config screen. Does that sound right to you?

zancas commented 2 years ago

@pspacek This issue was identified and fixed in system76/coreboot#72, which is why the issue is marked as closed. It won't be part of the next firmware update, but once an update dated later than August 20th is released, then the fix should be included. In the meantime, you could try building and flashing updated firmware locally on your system to confirm if that PR fixed the issue. First, install Rust nightly from rustup.rs, then run these commands:
git clone https://github.com/system76/firmware-open
cd firmware-open
./scripts/update.sh
./scripts/deps.sh
cd coreboot
git checkout master
cd ..
./scripts/build.sh <your-model-here>
./scripts/flash.sh <your-model-here>
The flashing script will power off the machine. After flashing, you can revert to normal firmware by using the normal firmware manager to "update."

If you're still seeing the issue with the latest version of coreboot, then it could actually be a different issue.

Hi! When your instructions say: <your-model-here> does that mean the four-letter-then-single-digit as seen on the firmware splash screen... e.g. galp5?

curiousercreative commented 2 years ago

Oh man, we're still waiting on a new galp5 firmware release! @zancas yes, I believe you're looking for galp5. There's also a way to specify this in a config.mk file, not sure where that's documented but that's a better solution for those of us who are only ever building a flashing for our own device.

jthornhill commented 2 years ago

OK, I think it's completely nuts that this still isn't actually fixed. It's been a problem on lemp10 for about a year now. Notably there was a firmware release that fixed this bug, but introduced other show stopper bugs, and so it was pulled.

This is the kind of thing that will dissuade me from buying System76 ever again.

mbk5631 commented 2 years ago

Yeah I got to that point already. Been 15 months now I've been putting up with this. I'm not about to build my own firmware - concerned about bricking or winding up with worse - and I have work to do. At this point I'm trying to decide whether I'm ready to buy a new laptop about 3 years prematurely, It was ok but not ideal as long as I could boot into Windows fairly easily depending on whether I needed to do a meeting or not but, well, geez! Probably will go back to Mac.

curiousercreative commented 2 years ago

@mbk5631 out of curiosity, what do you boot into Windows for? Every work meeting requires Windows? That sounds like hell...

mbk5631 commented 2 years ago

@curiousercreative Anything involving Zoom or other meeting software or bluetooth. Meeting software eventually bogs down. Somehow the wifi is sometimes flakey on some less common AP manufacturers (like what we have in this building) where it winds up renegotiating regularly. Neither pipewire nor pulseaudio work well for anything but playback. Anything requiring me to produce a word, or excel, or powerpoint that someone not using LibreOffice is going to see - somehow I almost always find the features that aren't 99.9% compatible. This has gotten somewhat better with a Microsoft Office online subscription, but that's costing me more than just buying the base product for a Mac. Adobe product support (I don't need much). I have tried using VMs and wine, but the level of tinkering is high and even though I have a separate drive for Windows, it just doesn't work well. Linux is my preferred environment - it's the one in which I'm most comfortable, but I'm also quite comfortable on Macs (can always drop into bash).

mbk5631 commented 2 years ago

A note - I don't mind booting into Windows for some things, and the issue with the AP flakiness appears to have been resolved recently. But this defect where I have to keep rewriting the boot record and then escape past the encryption key that doesn't get found on first reboot is a nuisance on something they should have patched a year ago. The boot record rewrite is scripted, so I just have to boot linux/log in to get Windows to work again - but that's bad enough as it slows me down - but Windows also doesn't always find the encryption key so when that happens I have to escape out of the "enter your bitlocker key" page and then it will find the key on the second pass.

curiousercreative commented 2 years ago

@mbk5631 are you on the pop-os chat server? There's a System76 channel, but I'd be curious if others have a pleasant dual boot experience. I'd search and discuss on the chat server to see if solutions or workarounds exist.

Generally, it sounds like you're having all kinds of pains. I started migrating from macOS about two years ago and I wasted a lot of effort trying to keep a macOS VM running and using it a couple times a week. Ultimately, my experience improved immensely when I dropped it altogether. Most Windows or macOS users will not migrate to Linux when they discover that a piece of software doesn't work well on their OS, they'll just ignore it and notify whoever cares that it doesn't work on their OS. Whether or not you're feeling that bold is for you to decide. More helpful perhaps, I wouldn't recommend running Linux Desktop with your software requirements. I understand the desire to use Linux, against all odds even, but I bet your life will improve dramatically once you amicably part ways with either Linux or the software that's not running well or flat out incompatible.

Ultimately, we'd all like to see these bugs squashed but I understand S76 is quite limited on firmware resources in comparison to outstanding issues and I don't imagine this is as high priority as several other longstanding issues that are likely impacting more S76 users.

curiousercreative commented 2 years ago

@mbk5631 and not to discount your experience by any means, just more data points, I haven't experienced any WiFi flakiness over the past year and a half. We had a bluetooth kernel bug preventing suspend a couple months ago, but I've been back to solid bluetooth lately. I'm not in meetings all day and my work uses Google Meet (I have it installed as a Chromium PWA), but I've never had any trouble with Zoom when I do participate in them. The only problem I can relate to is while I was running Wayland (I ran for about a year until recently) screen sharing wasn't working in Zoom last time I tried. Running X11 for the past couple months on my galp5 and screen sharing works as expected as does general video call performance. In contrast to others in a conference room, I see consistent load and fan speeds throughout long video calls (in part because I don't have any effects on my own image). All of this is to say, there may be remedies. The MS Office and Adobe software on the other hand, that's more what my last comment is about with cutting your losses and recognizing that Linux Desktop might not be the best fit.

mbk5631 commented 2 years ago

I went into this knowing I needed to dual boot. I'm mostly ok with doing that when I need to - I spent 20 years as a linux-based developer, and I've done that before. Dual boot worked fine for the first few months I had my lemp9. Then it was broken. The fix sits in git, but doing the build of just that one fix and applying it to my laptop, on which I depend, is not something I'm about to do. At this point I do need MS and Adobe far more than I did when I bought the laptop, so the result is I'm spending more time in Windows than I used to. But frankly, I should be able to do that as needed and not have to rewrite the boot menu each time. Never had trouble with that in a laptop before.

leviport commented 2 years ago

Thank you all for the feedback. I'll reopen this issue, but I must ask that we remain focused on tracking the bug on this bug tracking platform, not venting frustrations.

curiousercreative commented 2 years ago

@jthornhill my intention was not user blame. I think we're all on the same page here and validate your experience and others as something that needs fixing. Here's hoping we see a fix sooner than later, I'd look into it myself if it were impacting me.

crawfxrd commented 1 year ago

Original issue fixed with the move to SMMSTOREv2 and removal of clearing NVRAM on CMOS reset.

Track #340 to see if a release has been made for your model.

Use #437 if you have the issue on new firmware.

system76 / firmware-open

Dual boot options keep appearing and disappearing in dual boot on one drive setup #218