Closed blackgeorge-boom closed 1 year ago
Right after coalescing:
AArch64:
624B %20:gpr32 = COPY killed $w8
640B %26:gpr32 = nsw ADDWrr %20:gpr32, %26:gpr32
X86
592B %19:gr32temp = COPY killed $eax
624B %19:gr32temp = nsw ADD32rr %19:gr32temp(tied-def 0), %21:gr32temp, implicit-def dead $eflags
...
720B %21:gr32temp = COPY %19:gr32temp
%26
is used for sum
and %20
is used for the return value.%19
is used for the return value and %21
is used for the sum
.sum
needs to be initialized, which gives a larger live range for %26
in AArch64, leading to an eviction and different allocation.Intervals:
AArch64:
%26 [144r,176B:3)[304r,336B:0)[336B,368r:4)[400B,640r:1)[640r,800B:2) 0@304r 1@400B-phi 2@640r 3@144r 4@336B-phi weight:1.626846e-01
X86:
%19 [112r,176B:0)[320B,352r:2)[592r,624r:3)[624r,768B:1) 0@112r 1@624r 2@320B-phi 3@592r weight:3.078813e-01
The above are probably caused by a previous modification: https://github.com/blackgeorge-boom/llvm-project/pull/33
The problem is that wzr
in AArch64 can be copied to any register, whereas MOV32r0
can only be copied to temp registers, after the above PR. We can hack the copies from WZR
to use temp registers, but the subsequent copies do not do that:
224B %15:gpr32_and_gpr32temp = COPY $wzr
240B %13:gpr32all = COPY %15:gpr32_and_gpr32temp
...
304B %26:gpr32 = COPY %13:gpr32all
The problem is that the coalescer crushes the above to sth like:
304B %26:gpr32 = COPY $wzr
But this is not an issue with X86:
224B %14:gr32temp = MOV32r0 implicit-def dead $eflags
240B %12:gr32 = COPY %14:gr32temp
...
288B %21:gr32 = COPY %12:gr32
turns into:
288B %21:gr32temp = MOV32r0 implicit-def dead $eflags
which is because of rematerialization.
We can fix that by modifying the coalescing process.
AArch64:
X86: