A simple experiment to see the impact of only disabling the machine instruction scheduler.
X86: nettuno has more balanced results, showing that disabling the scheduler impacts negatively is, lu, mg, sp, and ua, for up to 5%.
AArch64: sole has more mixed results. Only sp and ua are impacted negatively (up to 12%), but cg and lu show speedups. Especially cg shows 50% speedup, which means that on arm the code generated from -O0 is of low quality, therefore the misched pass does more harm than good, and disabling it is beneficial.
A simple experiment to see the impact of only disabling the machine instruction scheduler.
X86: nettuno has more balanced results, showing that disabling the scheduler impacts negatively
is,lu,mg,sp, andua, for up to 5%.AArch64: sole has more mixed results. Only
spanduaare impacted negatively (up to 12%), butcgandlushow speedups. Especiallycgshows 50% speedup, which means that on arm the code generated from-O0is of low quality, therefore themischedpass does more harm than good, and disabling it is beneficial.