Closed blackgeorge-boom closed 10 months ago
Somehow we end up with this instruction:
renamable $rax = COPY renamable $ecx, implicit killed $rcx
MOVSX64rr32
works:def MOVSX64rr32: RI<0x63, MRMSrcReg, (outs GR64:$dst), (ins GR64:$src),
"movs{lq|xd}\t{$src, $dst|$dst, $src}",
[]>,
Sched<[WriteALU]>, Requires<[In64BitMode]>;
but other instructions, like the ISD:SIGN_EXTEND_INREG
, might use this MIR instruction with a 32-bit argument.
def : Pat<(sext_inreg GR64:$src, i32),
(MOVSX64rr32 (EXTRACT_SUBREG GR64:$src, sub_32bit))>;
MOVSX64rr32
.I've patched our LLVM to fix this.