Closed blackgeorge-boom closed 10 months ago
There are two issues here. First, we need to convert the AArch64 CSEL
into a two-address format. Also, there is an issue with how X86 lowers the select
IR instruction:
IR
t53: i32 = add OpaqueConstant:i32<75000>, Constant:i32<-1>, main.c:101:12
t54: i32 = select t89, t53, Constant:i32<0>, main.c:101:12
AArch64
%11:gpr32 = COPY $wzr
...
%16:gpr32 = CSELWr %14:gpr32(tied-def 0), %11:gpr32, 1, implicit $nzcv, debug-location !76; main.c:101:12
vs
X86
%2:gr32temp = MOV32r0 implicit-def dead $eflags
...
%11:gr32 = CMOV32rr %2:gr32temp(tied-def 0), killed %10:gr32, 5, implicit $eflags, debug-location !76; main.c:101:12
For some reason, X86 inverts the two operands of select
while lowering them.
From X86IselLowering.cpp
SDValue Ops[] = { Op2, Op1, CC, Cond }; <---
return DAG.getNode(X86ISD::CMOV, DL, Op.getValueType(), Ops);
Not sure why the inverted order.