While looking at the cosimulation tests, I noticed that the add test's first bundle contained two writes to r1.
This is a problem, as the handbook does not define what the semantics of this are and the simulator and emulator do different things.
In my opinion, this should be undefined behavior and documented as such in the handbook. This of course means no one should ever write to the same register in both slots.
I propose we keep the hardware implementation as is, since undefined behavior allows the hardware to do whatever it wants, while the simulator is updated to issue an error if it ever encounters it.
While looking at the cosimulation tests, I noticed that the
add
test's first bundle contained two writes tor1
. This is a problem, as the handbook does not define what the semantics of this are and the simulator and emulator do different things.In my opinion, this should be undefined behavior and documented as such in the handbook. This of course means no one should ever write to the same register in both slots. I propose we keep the hardware implementation as is, since undefined behavior allows the hardware to do whatever it wants, while the simulator is updated to issue an error if it ever encounters it.