Enhancement Request: Support for languages like verilog using begin/end pair.

[shankarpdy]

Hi boyw, It is a extremely nice and useful plugin. I have started using it everywhere. The hl-paran-mode is the most useful one.

Is it possible to support other parens also - like begin/end pair in verilog/vhdl. Can we define all the parenthesis pairs using a variable that can be highlighted.

[tcw165]

Good point! Sure it is possible. I'm working on it. BTW, what is the postfix of verilog/vhdl file?

Maybe I could refer to backward-up-list, backward-sexp or smartparen.

[shankarpdy]

for verilog - it is .v or .sv for vdhl it is *.vhd