Measure the performance of distributed compilers

[teaguetomesh]

We will need a whole host of metrics to understand:

1. How well does a given compiler perform?
2. How does the connection topology of a given architecture impact performance?
3. How does the size of intra-fridge modules impact performance?

Metrics:

• How does the depth of the compiled circuit compare to the critical depth of the original circuit?
• How many extra SWAP operations are needed?
• How many gate operations are needed within/between modules?
• What is the runtime of the compilation?

[teaguetomesh]

Given the goals above ^ we will want to represent compiled circuits using the lightest weight data structure possible while still providing enough information to answer those questions.

Something like a MappedDAG (comparable to Qiskit's DAGCircuit) might work well. The data structure we use will also depend on the way we want to compile abstract circuits to a given Device

• Use Qiskit's built in functions: probably easiest to keep all circuits as QuantumCircuits in which case we automatically have access to DAGCircuits, but there might be more overhead and bloatware when using Qiskit than would otherwise be needed.
• We write our own lightweight mappers and SWAP routers that take in two arguments, such as our_compile(circuit, device), that would then output a MappedDAG object.

The information the MappedDAG would need to contain is

• Which gates are acting on which qubits (we can use the same representation as Qiskit - nodes represent operations, edges represent qubits)
• We could add additional information to the edges such that we know exactly which Device Qubits they correspond to