Open zsisco opened 7 months ago
Want more expressive state update logic. Generate circuits (not just value output).
For example:
"!stop" .~~~. .+---------. "go" .-----------------+. ! |"acc':= 0"+~~~~~~~~~~~~~~~~>|"acc':= acc + val"| ! `----------' `-------+----------'<-' ^ ! ! ! "reset"! .------------. !"stop" `~~~~~~~~+"acc':= acc"|<~~~~~~~~' `------------'
So, some way to associate how external state acc gets updated according to the FSM state.
acc
Want more expressive state update logic. Generate circuits (not just value output).
For example:
So, some way to associate how external state
acc
gets updated according to the FSM state.