Is your feature request related to a problem? Please describe.
Currently, sending data between Tensix cores means using semaphore and DMA into another core's L1. This is very difficult for most people to work with. Let alone it's is very easy to screw up. It would make developing multi core kernels easier if sending data is easy(-er) then what it's lile now.
Describe the solution you'd like
There's many solution to the problem. Personally I prefer what AMD is doing with MLIR-AIE (ref PDF. Page 47-53)
The following is mocked host and kernel code that I hope demonstrates the principles and the use of the design. There a lot of detail missing but I hope it demonstrates a simplified method of sending data from a core to another.
architectural questions - assigning to the Davor / Jasmina. This was discussed in our meeting about mailbox idea. I will listed this as a nice to have for now and we can bump if the idea gains tractions.
Is your feature request related to a problem? Please describe.
Currently, sending data between Tensix cores means using semaphore and DMA into another core's L1. This is very difficult for most people to work with. Let alone it's is very easy to screw up. It would make developing multi core kernels easier if sending data is easy(-er) then what it's lile now.
Describe the solution you'd like
There's many solution to the problem. Personally I prefer what AMD is doing with MLIR-AIE (ref PDF. Page 47-53)
The following is mocked host and kernel code that I hope demonstrates the principles and the use of the design. There a lot of detail missing but I hope it demonstrates a simplified method of sending data from a core to another.
host:
Describe alternatives you've considered
There could/should be a long discussion on what's the best solution. But for this proposal, the point is as follows
Additional context Add any other context or screenshots about the feature request here.