JTAG support

[broskoTT]

Figure out how would JTAG read support fit into UMD diagram. The debuda team had this ask, @tt-vjovanovic raised this question. There are a few points that we could discuss:

• Is JTAG communication with chip in scope of UMD
• If yes, how would the support look like in the design? Does the driver automatically open the connection if available? Does user explicitly select which interface to use with the communication to the chip?
• Implication of local vs remote and pci vs jtag.

[broskoTT]

Related: https://yyz-gitlab.local.tenstorrent.com/tenstorrent/syseng/-/blob/blackhole-bringup/src/t6ifc/t6py/packages/tenstorrent/hw_connection.py?ref_type=heads#L125

[pjanevskiTT]

@tt-vjovanovic Talked with @avuckovicTT about jtag, seems that a lot of his work in tt-debuda would make sense to live in tt-umd. We can talk further about this in order to find the best solution. I told him to think about difficulty of porting that to tt-umd during his internship, if he doesn't have time, just to leave some docs on how to run and build everything around jtag in order to be able to port it to umd if needed