Older versions of UMD had support for programming the PCIe block's DMA controller via ARC FW. This programming technique is unsafe if code running on the device is issuing NOC transactions to PCIe with the intent of accessing the host system bus. Hence, the DMA controller is unused except in certain legacy code paths.
WH may offer a different technique to program the controller (registers are exposed in BAR2).
BH has different/improved addressing within the PCIe block.
Using the DMA controller for large transfers may offer a performance improvement over MMIO writes.
Older versions of UMD had support for programming the PCIe block's DMA controller via ARC FW. This programming technique is unsafe if code running on the device is issuing NOC transactions to PCIe with the intent of accessing the host system bus. Hence, the DMA controller is unused except in certain legacy code paths.
WH may offer a different technique to program the controller (registers are exposed in BAR2). BH has different/improved addressing within the PCIe block.
Using the DMA controller for large transfers may offer a performance improvement over MMIO writes.