Closed thejpster closed 4 years ago
The MBI (Monotron Bridge Interface) will look something like:
49 pins plus, ground, so say, 64 pins? On a 2x32 header? You'd have a basic sub-set that all CPU boards must implement (I2C, one IRQ, one UART, one SPI CS, etc) which allows for one slot. A fully-featured CPU board could handle four slots, with each slot using all three buses.
See GitHub.com/neotron-compute
It would be nice if 'Monotron' was an application you could run on different boards (see #12). @IGBC also wanted to port it to a board with an FPGA based GPU. This is the classic M-N problem.
Bad solution (M*N):
Better solution (M+N):
The standard microcontroller interfaces are:
We should endeavour to support all of these, as they all have their uses.
There are several interface pinouts in common use:
By adding another, we are in danger of:
The general idea I think should be:
i.e. a bunch of
M
CPU boards, designed for Nucleo-64, Launchpad, TinyFPGA, etc, and a bunch ofN
expansion boards, offering one or more connectors of a specific type.They interconnect using our own standard 'Bridge' interface, that carries as many signals as we can reasonably consider.