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threeme3 / usdx

Simple and experimental (class-E driven) SSB transceiver.
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Introduce hardware based I2C implementation #31

Closed howard0su closed 3 years ago

howard0su commented 3 years ago

It is based on I2C version: https://github.com/ExploreEmbedded/ATmega32_ExploreUltraAvrDevKit/blob/master/Code/AVR%20Example%20Code/00-libfiles/i2c.c

It is hardware based and poll based. It should only save some code space and code complexity. Due to the hardware limitation, the I2C bus speed set to 727.27k (= 16M / (16 + 2 * [3]).

Before: Sketch uses 27202 bytes (88%) of program storage space. Maximum is 30720 bytes. Global variables use 1291 bytes (63%) of dynamic memory, leaving 757 bytes for local variables. Maximum is 2048 bytes.

After: Sketch uses 26784 bytes (87%) of program storage space. Maximum is 30720 bytes. Global variables use 1291 bytes (63%) of dynamic memory, leaving 757 bytes for local variables. Maximum is 2048 bytes.

howard0su commented 3 years ago

It is potentially we can write without waiting and do something in the middle to improve the CPU load. But I didn't try that.

20 can resolved.

howard0su commented 3 years ago

No sure why I believe I tested this code. Seems it has some problem to prevent the rig starts.