Closed sachinami closed 1 month ago
PCI Express 6.0 Specification introduces new registers and modifies fields in existing ones.
This PR syncs MdePkg PciE headers with the spec update.
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Cc: Sergiy Yakovlev sergiyy@ami.com Cc: Felix Polyudov felixp@ami.com Cc: Dhanaraj V vdhanaraj@ami.com Cc: Ray Ni ray.ni@intel.com @niruiyu Cc: Zhichao Gao zhichao.gao@intel.com @ZhichaoGao Cc: Liming Gao gaoliming@byosoft.com.cn @lgao4
@lgao4 If there are no concerns can this change be merged
Closing https://github.com/tianocore/edk2/pull/5753 as this was merged instead
Wait, this PR misses DOE
Description
PCI Express 6.0 Specification introduces new registers and modifies fields in existing ones.
This PR syncs MdePkg PciE headers with the spec update.
How This Was Tested
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Integration Instructions
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Cc: Sergiy Yakovlev sergiyy@ami.com Cc: Felix Polyudov felixp@ami.com Cc: Dhanaraj V vdhanaraj@ami.com Cc: Ray Ni ray.ni@intel.com @niruiyu Cc: Zhichao Gao zhichao.gao@intel.com @ZhichaoGao Cc: Liming Gao gaoliming@byosoft.com.cn @lgao4