This PR adds a minimal SPI master to the application_fpga. This allows applications to access the Flash memory on the Tkey. The SPI master basically supports generating a clock, control the chip select, and send and receive a byte. SW much implement the functionality required to send commands and receive responses. Updates to tkey_libs will add this functionality.
Currently the SPI master is enabled in FPGA builds by including the flag symbol INCLUDE_SPI_MASTER to Yosys in the Makefile. The Makefile does not yet change pin constraint file. Instead the constraint file now always includes pins for the SPI interface. We would rather have a different target for builds with the SPI master, and have a specific constraint file for builds with our without the SPI master.
The commits should probably be squashed. And cleaned up.
This PR adds a minimal SPI master to the application_fpga. This allows applications to access the Flash memory on the Tkey. The SPI master basically supports generating a clock, control the chip select, and send and receive a byte. SW much implement the functionality required to send commands and receive responses. Updates to tkey_libs will add this functionality.
Currently the SPI master is enabled in FPGA builds by including the flag symbol INCLUDE_SPI_MASTER to Yosys in the Makefile. The Makefile does not yet change pin constraint file. Instead the constraint file now always includes pins for the SPI interface. We would rather have a different target for builds with the SPI master, and have a specific constraint file for builds with our without the SPI master.
The commits should probably be squashed. And cleaned up.