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tillitis / tillitis-key1

Board designs, FPGA verilog, firmware for TKey, the flexible and open USB security key 🔑
https://www.tillitis.se
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Minimal spi master #207

Closed dehanj closed 3 weeks ago

dehanj commented 2 months ago

This supersedes #203

This PR adds a minimal SPI master to the application_fpga. This allows applications to access the Flash memory on the Tkey. The SPI master basically supports generating a clock, control the chip select, and send and receive a byte. SW much implement the functionality required to send commands and receive responses. Updates to tkey_libs will add this functionality.

Currently the SPI master is enabled in FPGA builds by including the flag symbol INCLUDE_SPI_MASTER to Yosys in the Makefile. The Makefile does not yet change pin constraint file. Instead the constraint file now always includes pins for the SPI interface.

Rebased on main, and squashed.

Closes #213

dehanj commented 2 months ago

To minimize the risk during rebase and squash I created a new branch and a new PR. I suggest we merge this isntead of https://github.com/tillitis/tillitis-key1/pull/203 when we are ready and have tested it properly.

dehanj commented 2 months ago

I have verified both the builds with and without the SPI master. So far it looks good.

dehanj commented 2 months ago

This PR should be merged after #208, since it is a risk here that cache fetches the wrong bitstream.

mchack-work commented 1 month ago

SPI control addresses were missing from tk1_mem.h. I added them.