tillitis / tillitis-key1

Board designs, FPGA verilog, firmware for TKey, the flexible and open USB security key 🔑
https://www.tillitis.se
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Change names of ADDR_RAM_ASLR and ADDR_RAM_SCRAMBLE #219

Open mchack-work opened 2 months ago

mchack-work commented 2 months ago

To remove potentially confusing users we might want to change some names.

Quoting @secworks

I suggest that we change both address and data randomization to ADDR_RAM_ADDR_RAND and ADDR_RAM_DATA_RAND. We are performing basically the same randomization operation. for both. Scrambling is possibly more correct now, but is longer. And if move to a PRNG it is randomization.

This potentially changes both Verilog and tk1_mem.h.

I think it's more important to change the Verilog to avoid using the confusing "ASLR". Such a change doesn't affect software, either, but does affect forks and testbenches.

Changing the header file affects others. We need to be careful here. In the header file we currently have:

// Deprecated - use _ADDR_RAND instead
#define TK1_MMIO_TK1_RAM_ASLR 0xff000100

#define TK1_MMIO_TK1_RAM_ADDR_RAND 0xff000100
#define TK1_MMIO_TK1_RAM_SCRAMBLE 0xff000104

If we do a change to the header file, too, we will probably keep the old names for a while, but add the new names, too, just like the old RAM_ASLR.

secworks commented 2 months ago

The changes would look like this:

// Deprecated - use _ADDR_RAND and _DATA_RAND instead
#define TK1_MMIO_TK1_RAM_ASLR 0xff000100
#define TK1_MMIO_TK1_RAM_SCRAMBLE 0xff000104

#define TK1_MMIO_TK1_RAM_ADDR_RAND 0xff000100
#define TK1_MMIO_TK1_RAM_DATA_RAND 0xff000104