search

tillitis / tillitis-key1

Board designs, FPGA verilog, firmware for TKey, the flexible and open USB security key 🔑
https://www.tillitis.se
382 stars 24 forks source link

FPGA: Increase clock frequency and UART bitrate #237

Open secworks opened 2 weeks ago

secworks commented 2 weeks ago

FPGA clock increased to 21 MHz UART bitrate increased to 500 kbps

dehanj commented 2 weeks ago

Testing using tkey-random-generator pushing out 1 MB of data, no bit-errors. So UART/USB transfers seems stable.

Also running long term tests, locally by using a TKey with this daily. Will continue a few days more to see how it behaves.

dehanj commented 1 day ago

I see a need to be able to build the bitstream with the original baudrate of 62500. The question is how; build separate bitstream with some build flag, or let firmware decide on startup depending on what hardware/version is running.