Port daisho USB3.0 core to Xilinx parts

[mithro]

https://github.com/mossmann/daisho/tree/master/sw/fpga/common/usb3

https://github.com/mossmann/daisho/blob/master/sw/fpga/common/usb3/readme.txt

Porting Notes
-------------

This controller relies upon several vendor and family-specific features such as
PLLs, pipelined DDR I/O, distributed block RAM, and so on. 
Altera calls these "Megafunctions" and they are denoted by "mf_*.v" filenames.

If you are going to port this to Xilinx, Lattice, silicon then you will want to
blow these away and use the vendor's equivalent tools to get the same result.

I would recommend that you download Quartus and use the Megawizard Plug-in 
Manager to open these files so that you can see how they are supposed to work,
and how you would write wrappers for slightly different device functionality.

You're on your own here, this is not something I would recommend to an FPGA
newcomer (though arguably using this core itself is not trivial.)

[mithro]

Closing this as the HDMI2USB-jahanzeb-firmware is no longer under development.

All active development is now on the HDMI2USB-misoc-firmware which supports both the Atlys and Opsis boards and has loads of other new features!